74HC/HCT137 Philips Semiconductors (Acquired by NXP), 74HC/HCT137 Datasheet

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74HC/HCT137

Manufacturer Part Number
74HC/HCT137
Description
3-to-8 Line Decoder/demultiplexer With Address Latches; Inverting
Manufacturer
Philips Semiconductors (Acquired by NXP)
Datasheet
Product specification
File under Integrated Circuits, IC06
DATA SHEET
74HC/HCT137
3-to-8 line decoder/demultiplexer
with address latches; inverting
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
INTEGRATED CIRCUITS
December 1990

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74HC/HCT137 Summary of contents

Page 1

... DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT137 3-to-8 line decoder/demultiplexer with address latches; inverting Product specification File under Integrated Circuits, IC06 ...

Page 2

... Active LOW mutually exclusive outputs Output capability: standard I category: MSI CC GENERAL DESCRIPTION The 74HC/HCT137 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = ...

Page 3

... Fig.3 IEC logic symbol. December 1990 NAME AND FUNCTION data inputs 2 latch enable input (active LOW) data enable input (active LOW) data enable input (active HIGH) ground (0 V) multiplexer outputs 7 positive supply voltage 3 Product specification 74HC/HCT137 Fig.2 Logic symbol. Fig.4 Functional diagram. ...

Page 4

... Fig.5 Logic diagram. 4 Product specification 74HC/HCT137 OUTPUTS stable ...

Page 5

... Product specification 74HC/HCT137 . TEST CONDITIONS UNIT V WAVEFORMS 125 (V) min. max. 270 2 4.5 Fig.6 46 6.0 285 2 4.5 Fig.7 48 6.0 220 2 4.5 Fig.7 38 6.0 220 2 ...

Page 6

... Product specification 74HC/HCT137 . TEST CONDITIONS UNIT WAVEFORMS 125 (V) min. max 4.5 Fig 4.5 Fig 4.5 Fig 4.5 Fig 4.5 Fig.6 ...

Page 7

... HCT 1 Fig.7 Waveforms showing the enable input (E ) and n to output (Y ) propagation n output transition times. input to LE input and the latch enable pulse width Product specification 74HC/HCT137 = GND GND LE propagation delays and the n ...

Page 8

... Philips Semiconductors 3-to-8 line decoder/demultiplexer with address latches; inverting PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines” December 1990 . 8 Product specification 74HC/HCT137 ...

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