74HC/HCT20 Philips Semiconductors (Acquired by NXP), 74HC/HCT20 Datasheet
74HC/HCT20
Related parts for 74HC/HCT20
74HC/HCT20 Summary of contents
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... DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT20 Dual 4-input NAND gate Product specification File under Integrated Circuits, IC06 INTEGRATED CIRCUITS ...
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... SSI CC GENERAL DESCRIPTION The 74HC/HCT20 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT20 provide the 4-input NAND function. QUICK REFERENCE DATA GND = ...
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... GND Fig.1 Pin configuration. December 1990 NAME AND FUNCTION data inputs data inputs not connected data inputs data inputs data outputs ground (0 V) positive supply voltage Fig.2 Logic symbol. 3 Product specification 74HC/HCT20 Fig.3 IEC logic symbol. ...
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... Fig.6 HCT logic diagram (one gate). December 1990 Fig.5 HC logic diagram (one gate). FUNCTION TABLE INPUTS Notes HIGH voltage level L = LOW voltage level X = don’t care 4 Product specification 74HC/HCT20 OUTPUT ...
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... TLH December 1990 amb 74HC + +85 min. typ. max. min. max 115 Product specification 74HC/HCT20 . TEST CONDITIONS UNIT V WAVEFORMS +125 (V) min. max. 135 ns 2.0 Fig.7 27 4.5 23 6.0 110 ns 2.0 Fig.7 22 4.5 19 6.0 ...
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... Logic Package Outlines” December 1990 ) for a unit load given in the family specifications amb 74HCT + +85 min. typ. max. min. max Product specification 74HC/HCT20 . TEST CONDITIONS UNIT V WAVEFORMS +125 (V) min. max 4.5 Fig 4.5 Fig.7 ...