MC74HC02ANG ON Semiconductor, MC74HC02ANG Datasheet

IC GATE NOR QUAD 2INPUT 14DIP

MC74HC02ANG

Manufacturer Part Number
MC74HC02ANG
Description
IC GATE NOR QUAD 2INPUT 14DIP
Manufacturer
ON Semiconductor
Series
74HCr
Datasheets

Specifications of MC74HC02ANG

Logic Type
NOR Gate
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
14-DIP (0.300", 7.62mm)
Product
NOR
Logic Family
74HC
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
75 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 55 C
Circuit Type
Low-Power Schottky
Current, Supply
40 μA
Function Type
2-Inputs
Logic Function
NOR Gate
Package Type
PDIP-14
Temperature, Operating, Range
-55 to +125 °C
Voltage, Supply
2 to 6 V
Output Current
5.2mA
No. Of Inputs
2
Supply Voltage Range
2V To 6V
Logic Case Style
DIP
No. Of Pins
14
Operating Temperature Range
-55°C To +125°C
Filter Terminals
DIP
Rohs Compliant
Yes
Family Type
HC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC74HC02ANGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74HC02ANG
Manufacturer:
ON Semiconductor
Quantity:
75
MC74HC02A
Quad 2−Input NOR Gate
High−Performance Silicon−Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
Features
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 11
The MC74HC02A is identical in pinout to the LS02. The device
No. 7.0 A
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
Chip Complexity: 40 FETs or 10 Equivalent Gates
Pb−Free Packages are Available
A1
B1
A2
B2
A3
B3
A4
B4
2
3
5
6
8
9
11
12
GND
Y1
A1
B1
Y2
A2
B2
PIN ASSIGNMENT
LOGIC DIAGRAM
1
2
3
4
5
6
7
PIN 14 = V
PIN 7 = GND
14
13
12
10
11
9
8
V
Y4
B4
A4
Y3
B3
A3
CC
CC
10
13
1
4
Y1
Y2
Y3
Y4
Y = A + B
1
14
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
14
14
1
(Note: Microdot may be in either location)
1
ORDERING INFORMATION
1
A
WL or L = Wafer Lot
YY or Y
WW or W = Work Week
G or G
http://onsemi.com
FUNCTION TABLE
A
H
H
L
L
CASE 948G
Inputs
CASE 751A
DT SUFFIX
TSSOP−14
CASE 646
N SUFFIX
D SUFFIX
SOIC−14
PDIP−14
= Assembly Location
= Year
= Pb−Free Package
B
H
H
L
L
Publication Order Number:
14
1
14
1
Output
14
MC74HC02AN
Y
H
AWLYYWWG
1
L
L
L
DIAGRAMS
MC74HC02A/D
MARKING
AWLYWW
HC02AG
ALYWG
HC
02
G

Related parts for MC74HC02ANG

MC74HC02ANG Summary of contents

Page 1

MC74HC02A Quad 2−Input NOR Gate High−Performance Silicon−Gate CMOS The MC74HC02A is identical in pinout to the LS02. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Features • Output Drive Capability: ...

Page 2

... SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Symbol Parameter Î ...

Page 3

... Current (per Package) NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 4

... ORDERING INFORMATION Device MC74HC02AN MC74HC02ANG MC74HC02AD MC74HC02ADG MC74HC02ADR2 MC74HC02ADR2G MC74HC02ADTR2 MC74HC02ADTR2G MC74HC02AFEL MC74HC02AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free INPUT 90% ...

Page 5

−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...

Page 6

... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 7

... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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