cxa1871s Sony Electronics, cxa1871s Datasheet

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cxa1871s

Manufacturer Part Number
cxa1871s
Description
Ntsc/pal Y/c/jungle
Manufacturer
Sony Electronics
Datasheet
Description
NTSC and PAL color TV luminance signal
processing, chroma signal processing, sync signal
processing, and RGB signal processing onto a
single chip.
Features
• I
• H and V oscillation frequencies made non-
• Non-adjusting Y system filters (chroma trap, delay
• Built-in V picture distortion correction circuit
• Built-in delay line aperture compensation
• Auto cut-off function for automatic CRT cut-off
• Multiple inputs
• Multiple system configuration possible using a non-
Applications
Structure
The CXA1871S is a bipolar IC which integrates the
and user controls performed with two bus lines
SCL and SDA.
adjusting with a countdown system.
line)
adjustment and compensation for changes with
time
Composite Video
adjusting SECAM chroma decoder.
Color TV
Bipolar silicon monolithic IC
2
NTSC/PAL Y/C/Jungle
C bus compatible. Various types of adjustments
(Built-in 2-input, 1-output video switch)
Y/C separation input: 1 system
On screen display input: 1 system
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
2 systems
—1—
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation P
Operating Conditions
Supply voltage
CXA1871S
48 pin SDIP (Plastic)
Topr –20 to +75 °C
Tstg –65 to +150 °C
V
V
CC
CC
D
9±0.5
1.8
12
E95432-TE
W
V
V

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cxa1871s Summary of contents

Page 1

... NTSC/PAL Y/C/Jungle Description The CXA1871S is a bipolar IC which integrates the NTSC and PAL color TV luminance signal processing, chroma signal processing, sync signal processing, and RGB signal processing onto a single chip. Features • bus compatible. Various types of adjustments 2 and user controls performed with two bus lines SCL and SDA. • ...

Page 2

... CXA1871S ...

Page 3

... OSD OSD S/H R OUT S OUT S/H B OUT —3— CXA1871S R-Y OUT B-Y OUT B SYNC H SYNC SCP SDA SCL REG IREF AFC CERA J GND HP XRAY HD V PLS V LPF V OSC ABL LPF VD ABL ...

Page 4

... 150 25 —4— CXA1871S Description When the the SECAM identification mode, the 4.43 MHz VCO oscillation waveform is output from this pin only during the VBLK period centering current of 150 µA is led from this pin during this identification mode, the IC switches to the SECAM mode ...

Page 5

... 1 —5— CXA1871S Description Peak hold pin for V sync separation. Connect a capacitor. Video switch output pin. Y signal input pin. Input via a capacitor. Standard input level: 2 Vp-p Auto pedestal (black stretch) black peak hold pin. Connect a capacitor. ...

Page 6

... 1.2 k —6— CXA1871S Description Chroma signal input pin. Standard input level (burst level) : 570 mVp-p Video system (Y/C/RGB) GND pin. Blanking signal input pin for OSD RGB input Blanking not performed Signal from Y IN/C IN lowered by – ...

Page 7

... 100 —7— CXA1871S Description R, G and B output pins. Inputs the signal obtained by converting the CRT beam current (IK) into voltage. Connect to an emitter follower via a capacitor. ABL voltage input pin. Vertical deflection sawtooth wave output pin. ...

Page 8

... —8— CXA1871S Description Connect a capacitor to generate the V sawtooth wave. Connect a capacitor to hold the AGC voltage which maintains the V sawtooth wave at a constant amplitude. V pulse output pin. A negative polarity pulse 3 to 3.5 H width is output from this pin. ...

Page 9

... 1 150 38 —9— CXA1871S Description H pulse input pin. Inputs Vp-p signal via a capacitor. Jungle system (H/V) GND pin. Connect (503.5 kHz) ceramic oscillator. AFC lag-lead filter CR connection pin. Connect resistor between this pin and GND. ...

Page 10

... 150 V sync separation input pin. Inputs Vp-p video signal via a capacitor µA and resistor —10— CXA1871S Description . Connect bus SCL (Serial Clock) and SDA Vilmax = 1.5 V Vihmin = 3 V Volmax = 0.4 V 5.0 V BGP 2.5 V H,VBLK ...

Page 11

... B-Y OUT R-Y OUT Equivalent circuit V CC Color difference signal input pins. 1.2 k Input via capacitors BGP 100 µ Color difference signal output pins —11— CXA1871S Description Standard input level B-Y: 1.33 Vp-p R-Y: 1.05 Vp-p Standard input level B-Y: 0.665 Vp-p R-Y: 0.525 Vp-p ...

Page 12

... Sig-H7 to rise of Pin 34. 34 HD,H 32 Pin Pin 23 34 Pin 34 HPBLK1 42 VSBL VSL Check that HD appears at 2.4 V and disappears 32 at 2.8 V. —12— CXA1871S Min. Typ. Max. 70 105 140 Min. Typ. Max. 15.47 15.65 15.83 kHz –400 — 400 AFCmax=t1-t2 0.12 0.30 0.48 AFCcen=t1-t2 — 0.5 — AFCmin=t1-t2 0.75 1.2 1.75 ...

Page 13

... Pin 26 COMP:7, 31 VZ2 V zooming 2 Pin 26 Measurement Measurement method conditions pin 31 VPLS, L Pin GND Video 27 In: Sig-V1 VTRIG 0.1 ms 8.75 ms 16.57 ms —13— CXA1871S Min. Typ. Max. Unit 4 4 VPLS 0.1 0 2.75 2.9 3.05 V Vb-VDcen –140 –125 –115 mV Vb-VDcen 110 120 140 mV Vc-Va 0.9 1 ...

Page 14

... Vdw Sig-Y1 Video In: Vdb Sig-H1 Video In: Vdpp 19 Sig-Y3 Video In: Vdw Sig-Y1 Video In: Sig-H1 Vdb Video In: 19 Sig-H1 Video In: 19 Sig-Y10 —14— CXA1871S Min. Typ. Max. Unit — 2.5 — V Vsc1 20log 2.2 2.7 3 Vsc2 20log –3.8 –3.3 –2 Vtr1 Vtr2 20log — ...

Page 15

... During Sig-C4 -C4 Vc3 Vc4 19 Video In: V1 Sig-H1 In: Sig -C4 - Video In: 19 Sig-H1, C In: Sig -C5 21 f=100 kHz —15— CXA1871S Min. Typ. Max. Von Von 20log –6 –4.5 –3 Voff Voff Vin 5.5 6 6.5 Vout 20log Vin –0.5 0 0.5 Min. Typ. Max. ...

Page 16

... Vgg f=100 kHz Vac1 20 Vac2 f=100 kHz 23 -C9 -C11 -C11 Vx 23 -C11 -C11 48 47 — VBR=VBY/VRY —16— CXA1871S Min. Typ. Max. Unit 90°+ Vr2 deg tan –1 Vr1 270°– Vg2 229 236 243 deg –1 tan Vg1 ...

Page 17

... Vary the voltage applied to Pin 26 and measure the 19 voltage at which picture ABL operates Video In: Vp Sig- Pin 28 Measure the R, G and B blanking levels. 23 —17— CXA1871S Min. Typ. Max. Vr0 Vdr1 20log 0.7 1.5 2.2 Vr0 Vdr1 Vdr2 20log –5.2 –4.5 –3.3 Vr0 Vdr2 ...

Page 18

... Sig-V1 Vlk,b Vlk,g Vlk,r Vlk,clp REFP Vsig 19 Video In: Sig- Vref —18— CXA1871S Min. Typ. Max. Unit VIK 1.25 1.35 1.45 V 0.76 0.86 0.96 V 0.25 0.35 0.45 V Vlkg, b-Vlk, r –0.64 –0.54 –0.44 V 3.2 3.5 4.0 V Vref 0.45 0.85 1.25 V –0.5 –0.4 –0.3 V Vsig-Vref –0.46 –0.36 –0.26 V 0.3 ...

Page 19

... CXA1871S Max. Unit 5 µA 10 µA 0.4 V — 100 kHz — µs — µs — µs — µs — µs — ...

Page 20

... SIG-H3 4.96 µs SIG-H4 4.51 µs SIG-H5 5.13 µs SIG-H6 4.73 µs SIG-H7 4.88 µs 63.556 µs 0.57 V 61.98 µs 0.57 V 65.21 µs 0.57 V 59.759 µs 0.57 V 67.870 µs 0.57 V 62.563 µs 0.57 V 64.583 µs 0.57 V —20— CXA1871S f =15.734 kHz H f +400 –400 kHz H f –1 kHz H f +250 –250 Hz H ...

Page 21

... V system Equivalent pulse 3 H SIG-V1 Equivalent pulse interval Vsync interval Vsync3 H Equivalent pulse 3 H 4.8 µs 2.5 µs —21— CXA1871S 1 H=63.556 µ 262 V H ...

Page 22

... Y system 1.7 µs 9.5 µs SIG-Y1 4.8 µs SIG-Y2 1.7 µs 9.5 µs SIG-Y3 4.8 µs SIG-Y4 SIG-Y5 1.43 V 0. µs 0.57 V —22— CXA1871S 0 3.58 MHz 0 100kHz 0 3MHz ...

Page 23

... SIG-Y6 SIG-Y7 SIG-Y8 SIG-Y9 SIG-Y10 6.6µs 9.8µs SIG-Y11 4.8µs 0.7V 0.28V 1.4V 0.7V 0.14V 1.43V 0.57V 63.556µs —23— CXA1871S f = 8MHz MHz f = 5MHz MHz ...

Page 24

... SIG-C1 0.5 Vp-p 3 µs fsc–350 Hz SIG-C2 0.5 Vp-p fsc0° SIG-C3 0.5 Vp-p fsc0° SIG-C4 0.5 Vp-p fsc SIG-C5 0.5 Vp-p fsc SIG-C6 1 Vp-p 63.556 µs 0.57 V fsc+100kHz, 0.1 Vp-p fsc+100 kHz, 0.1 Vp-p fsc+90°, 0.3 Vp-p fsc-90°, 0.3 Vp-p 35.5 µs fsc+0°, 0.3 Vp-p fsc+180°, 0.3 Vp-p 35.5 µs fsc+100 kHz, 0.5 Vp-p fsc+100 kHz, 1.0 Vp-p —24— CXA1871S f = 15.734 kHz ...

Page 25

... SIG-C12 0.5 Vp-p fsc0° SIG-C13 0.5 Vp-p 63.556 µs 0.57 V fsc+100 kHz, 50 mVp-p fsc+100 kHz, 32 mVp-p fsc+100 kHz, 5 mVp-p fsc+500 kHz, 0.1 Vp-p fsc–500 kHz, 0.1 Vp-p fsc–13°, 0.96 Vp-p fsc+167°, 0.96 Vp-p 35.5 µs fsc+104°, 1.36 Vp-p fsc–76°, 1.36 Vp-p 35.5 µs —25— CXA1871S f = 15.734 kHz H –20 dB –30 dB –40 dB ...

Page 26

... RGB system SIG-R1 SIG-R2 SIG-R3 1.43 Vp-p 0.7 Vp 2.5 V —26— CXA1871S ...

Page 27

... Minimum value SYSTEM2 NTSC detective SYSTEM3 axis SYSTEM4 BLACK OFF SYSTEM5 DY COL OFF X’TAL PIN Center value DELAY Minimum value 4.43X’TAL BLUE OFF EXT COLOR —27— CXA1871S No. Initial Description of bits setting Luminance level small 5 F Center value ...

Page 28

... G S/H V OSC OUT ABL LPF S OUT ABL 0.22 µ 10 µ —28— CXA1871S µ 0.01 µ 1 µ 1 µ 1 µ 4700 p 100 0.01 µ 5.6 k 2.2 µ 500 kHz ceramic oscillator 2.2 k 4.7 µ 9/5 V 0/6V Pin 18, 20, 22 and 24 switches are ON only for electrical characteristic measurements No ...

Page 29

... Pulse width 12 µ 3.3 k 1000 4538 Delay 10 µs B-Y OUT B TDA4665 SCP —29— CXA1871S + the IC 2SA1175 47 k GND 6 µ ...

Page 30

... G OUT ABL LPF 220 OUT ABL 100 —30— CXA1871S Color difference output delay line 1 µ Color difference input from µ delay line 330 1 µ 220 k 560 4700 p Sand Cathle Pulse output 220 ...

Page 31

... BGP, HBLK and VBLK are output to Pin 42 as SCP (Sand Cathle Pulse). Note) If external capacitance of Pin 30 is used with 0.1 µF or less of the recommended value, vertical sync output may be unstable. When changing the capacitance value, use it with 0.047 µF or more. —31— CXA1871S ...

Page 32

... R-Y sub-carrier is detected phase error is detected at this time corrected by applying feedback to the flip flop. 2 systems (The gain can be switched between 0 and 6 dB for both systems.) 1 system 2 C bus register, and fed back to the ACC again. When 2 C bus register. —32— CXA1871S ...

Page 33

... C bus register. The digital R, G and B signals are mainly used for bus register for drive control. For cut-off control, a loop 2 C bus register. The positions of the reference pulses can be —33— CXA1871S 2 C bus register bus register bus register. ...

Page 34

... KILLER=ON (2) 50/60 identification result (3) SECAM ID=ON (1) KILLER=OFF Pin 3 (1) KILLER=OFF Pin 4 (1) KILLER=OFF —34— CXA1871S Conditions for releasing the lock (1) KILLER=ON (2) When NT/PAL identification result changes from PAL to NTSC 2 (1) KILLER=ON (2) When NT/PAL identification result changes from PAL to 2 NTSC ...

Page 35

... REF G DRIVE B DRIVE V ON VSHIFT V SIZE SYSTEM3 SYSTEM4 4.43X’TAL EXT COLOR bit 5 bit 4 bit 3 KILLER XRAY NT/PAL —35— CXA1871S bit 2 bit 1 bit 0 RGB LIM GAIN NR ON SUB CONT SUB COLOR TRAP ON TOT ON PRE OVER AXIS ABL BLUE OSD ...

Page 36

... Sub Address SHARPNESS (4) Sharpness control 00100 0 = Minimum 15 = Maximum SUB CONT ( Minimum 15 = Maximum Picture control RGB output amplitude limiter voltage control Hue control Input selector switch Color control SW output gain switching Brightness control Y signal noise reduction ON/OFF Sub-contrast control —36— CXA1871S ...

Page 37

... Pre Shoot 25 %, Over shoot 75 % AXIS( NTSC 1 = PAL Hue center control Color center control Chroma trap in Y system ON/OFF Chroma TOT filter ON/OFF Picture mute ON/OFF R OUT ON/OFF G OUT ON/OFF B OUT ON/OFF Sets the sharpness preshoot and overshoot ratio. Detective axis switching —37— CXA1871S ...

Page 38

... Switches the auto cut-off reference pulse position. ABL mode setting On screen display B IN ON/OFF. Setting to ON turns the entire screen BLUE. On screen display luminance setting G OUT drive control DC transmission ratio setting B OUT drive control correction value setting —38— CXA1871S ...

Page 39

... G OUT cut-off voltage control B OUT cut-off voltage control Horizontal position control VD output ON/OFF V sync expansion ON/OFF AFC loop gain switching Vertical position control Vertical correction amount setting for high voltage fluctuations Vertical amplitude control V countdown system mode switching —39— CXA1871S ...

Page 40

... Sub Address V LIN (4) 01111 0 = Top of screen compressed, bottom of screen expanded Top of screen expanded, bottom of screen compressed. S CORR ( correction amount minimum correction amount maximum Vertical linearity control Vertical S correction control —40— CXA1871S ...

Page 41

... Selects which of the crystals connected to the various pins to use. Inputs whether the crystal connected to Pin 2 is 3.58 MHz or 4.43 MHz. (When connecting a 4.43 MHz crystal, be sure to connect it to Pin 2.) Forcibly switches the DET SW input to external input (R-Y IN, B-Y IN). Allows the following delay times to be added to the Y signal. —41— CXA1871S ...

Page 42

... Identifies whether the input signal is NTSC or PAL and returns the results NTSC 1 = PAL 50/60 (1) Returns the 50/60 Hz identification results VCO-F (1) Detects the burst frequency of the input signal and returns the results 3.58 MHz 1 = 4.43 MHz SECAM (1) Identifies whether the input signal is SECAM or a different signal and returns the results. —42— CXA1871S ...

Page 43

... Fig 4. Auto pedestal characteristics GAMMA = 7 GAMMA = 3 GAMMA = 0 Input 100 amplitude (IRE) —43— CXA1871S TOT TOT 200 400 600 800 fsc (kHz) fsc = 3.58MHz Input: IRE changed at Full Flat Output: R OUT DYCOL= AKB=OFF GAMMA=DCTRAN=0 Input 30 40 ...

Page 44

... Fig 7. Cutoff control characteristics drive data (HEX) 3.0 2.0 1.0 10 ABL Applied Fig 9. Picture control data (HEX) voltage (V) —44— CXA1871S +3.0dB Rch = 0.86 Vp-p Input all black AKB = ON Output: IK (Pin 21 cutoff data (HEX) Input: Y 1.4Vp-p (black to white) IN Output: ROUT ...

Page 45

... ABL-FIL Fig 11. ABL characteristics (bright) applied voltage (V) 3.0 OSD = 1 2.0 OSD = 0 1 1.0 2.0 OSDR Fig 13. OSD-BLK voltage applied voltage (V) —45— CXA1871S ABL ABL-FIL applied voltage (V) Input Y 1.4Vp-p (black to white) IN Output R OUT PIC = 3F SUBCONT = 7 AKB = OFF –5.7dB 3.0 4.0 5.0 OSD-BLK ...

Page 46

... SONY CODE EIAJ CODE JEDEC CODE 48PIN SDIP (PLASTIC) + 0.4 – 0 1.778 0.5 ± 0.1 0.9 ± 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT SDIP-48P-02 SDIP048-P-0600 LEAD MATERIAL PACKAGE MASS —46— CXA1871S 0° to 15° EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 5.1g ...

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