cxa1372bs Sony Electronics, cxa1372bs Datasheet
cxa1372bs
Related parts for cxa1372bs
cxa1372bs Summary of contents
Page 1
... QFP (Plastic) Absolute Maximum Ratings (Ta = 25°C) • Supply voltage V – • Operating temperature Topr • Storage temperature Tstg • Allowable power dissipation P 457 (CXA1372BQ) D 833 (CXA1372BS) Recommended Operating Conditions V – – – 1 – CXA1372BS 48 pin SDIP (Plastic – ...
Page 2
Block Diagram RFI RFO 40 • TTL • IIL TZC 42 DFCT 43 TE TDFCT 44 ATSC 45 • WINDOW COMPARATOR • BPF FZC 46 DFCT FE 47 FDFCT ...
Page 3
... CXA1372BQ CXA1372BS – 3 – CXA1372BQ/ DATA 24 23 XLT 22 CLK 21 LOCK DIRC SSTOP 17 ISET 16 FSET SL– 15 SLO 14 13 ...
Page 4
Pin Description Pin No. Symbol I FGD FS3 FLB FEO TAO SLO O FE– ...
Page 5
Pin No. Symbol I SRCH TGU TG2 9 TA– SL SL– Equivalent circuit 147 11µA 3.5µA 50k ...
Page 6
Pin No. Symbol I FSET ISET SSTOP DIRC LOCK CLK XLT ...
Page 7
Pin No. Symbol I MIRR O 147 38 147 29 20k CC1 147 CC2 30 36 DFCT O 147 ...
Page 8
Pin No. Symbol I RFI 40k 147 RFO 147 TZC TDFCT I 2 Vcc ATSC ...
Page 9
SERVO FOCUS – 9 – CXA1372BQ/BS SERVO TRACKING ...
Page 10
SERVO SERVO TRACKING SLED – 10 – CXA1372BQ/BS FOK ...
Page 11
MIRROR DEFECT – 11 – CXA1372BQ/BS EFM ...
Page 12
Electric Characteristics Measurement Circuit DVcc 3300P 1000P DGND 38 CP 3300P DGND 39 RFI RFO AC V3 GND AC GND TZC 42 GND ...
Page 13
Description of Functions Focus Servo 1.2k 56k FZC 46 FE 10k 47 22k 2200p FE DFCT 470k 48 FDFCT 0.1µ FGD 2 0.1µ 46k 3 FS3 580k The above figure shows a block diagram of the focus servo. Ordinarily the ...
Page 14
Tracking Sled Servo 0.022µ 42 TZC 100k 0.047µ ATSC BPF TE 100k 43 DFCT TE 470k 22k 680k 44 TG1 0.1µ TDFCT TM1 TGU 8 20k 0.033µ TG2 TG2 9 470k The above figure shows a block ...
Page 15
Focus OK circuit RFO RF signal C5 0.01µ RFI The focus OK circuit creates the timing window okaying the focus servo from the focus search state. The HPF output is obtained at Pin 39 from Pin 40 (RF signal), and ...
Page 16
DEFECT circuit After inversion, RFI signal is bottom held by means of the long and short time constants. The long time- constant bottom hold keeps the mirror level prior to the defect. The short time-constant bottom hold responds to a ...
Page 17
Mirror Circuit The mirror circuit performs peak and bottom hold after the RFI signal has been amplified. For the peak hold, a time constant can follow a 30kHz traverse, and, for the bottom hold, one can follow the rotation cycle ...
Page 18
Commands The input data to operate this IC is configured as 8-bit data; however, below, this input data is represented by 2-digit hexadecimal numerals in the form $XX, where hexadecimal numeral between 0 and F. Commands for ...
Page 19
FS4 This switch is provided between the focus error input (Pin 47) and the focus phase compensation, and is in charge of turning the focus servo ON and OFF. $00 $08 Focus OFF Focus ON 1-2. Procedure of focus ...
Page 20
Note that the time from the High to Low transition of FZC to the time command $08 is asserted must be minimized this, the software sequence shown better than the sequence shown in A. FZC ...
Page 21
A] Envelope RFI 39 Detection Tracking error [ D] Waveform (TZC) 42 Shaping From inner to outer track [ $2X (“TZC” at ...
Page 22
DIRC (Pin 20) and 1 Track Jump Normally, an acceleration pulse is applied for a 1-track jump. Then a deceleration pulse is given for a specified time observing the tracking error from the moment it passes point 0, and tracking ...
Page 23
This command selects the focus search and sled kick levels. D0, D1 ..... Sled, NORMAL feed, high-speed feed D2, D3 ..... Focus search level selection Focus search level (PS4 ...
Page 24
Parallel Direct Interface 1. DIRC $28 latch XLT DIRC ON FWD JUMP OFF REV JUMP OFF ON TRACK SERVO OFF ON SLED SERVO OFF 2. LOCK (Sled overrun prevention circuit) LOCK ON SLED SERVO ON TG1, TG2 TRACKING GAIN DOWN ...
Page 25
CPU Serial Interface Timing Chart DATA WCK CLK 1/fck XLT Item Symbol Clock frequency fck Clock pulse width fwck t Setup time su t Hold time h t Delay time D t Latch pulse width WL System ...
Page 26
Serial Data Truth Table Serial data Hex. FOCUS CONTROL $ $ $ $ ...
Page 27
EXCK LDON SQSO FOK SQCK SENS MUTE XRST SENS DATA XRST XLT DATA CLK XLAT GFS V DD SUBQ CLOK SQCK SEIN SCOR CNIN MUTE DATO XLTO DD V CLKO GND MIRR RFI O V RFO ...
Page 28
Notes on Operation 1. Connection of the power supply pin Vcc +5V dual ±5V power supplies single 5V power supplies +5V 2. FSET pin The FSET pin determines the cut-off frequency fc for the focus and tracking high-frequency phase compensation. ...
Page 29
Mirror Circuit (1) The equivalent circuit of MIRR output pin is as follows. MIRR comparator output is: Output voltage High MIRH CC Output voltage Low: V near DGND MIRL 9. EFM Comparator (1) Note that EFM duty ...
Page 30
FOCUS TRACKING – 30 – CXA1372BQ/BS ...
Page 31
Example of Representative Characteristics FLB 30 C FGD TGU –10 – FOCUS frequency characteristics = 0.1µ = 0.1µ G NORMAL GAIN ...
Page 32
... Package Outline Unit: mm CXA1372BQ 0.8 SONY CODE EIAJ CODE JEDEC CODE CXA1372BS 48 1 SONY CODE EIAJ CODE JEDEC CODE 48PIN QFP (PLASTIC) 15.3 ± 0.4 + 0.4 12.0 – 0 0.15 0.3 – 0.1 ± 0. 0.35 2.2 – 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SOLDER / PALLADIUM LEAD TREATMENT QFP-48P-L04 ...