lc72133m Sanyo Semiconductor Corporation, lc72133m Datasheet - Page 11

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lc72133m

Manufacturer Part Number
lc72133m
Description
Pll Frequency Synthesizer For Electronic Tuning
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
Continued from preceding page.
(10)
No.
(6)
(7)
(8)
(9)
DO pin control data
DOC0, DOC1, DOC2
Unlock detection data
UL0, UL1
Phase comparator
control data
DZ0, DZ1
Clock time base
TBC
Charge pump control data
DLC
Control block/data
• Data that determines the DO pin output
Caution: The state of the DO pin during a data input period (an IN1 or IN2 mode period with CE
• Selects the phase error (øE) detection width for checking PLL lock.
• Controls the phase comparator dead zone.
• Forcibly controls the charge pump output.
The open state is selected after the power-on reset.
Note: 1. end-UC: Check for IF counter measurement completion
A phase error in excess of the specified detection width is seen as an unlocked state.
Note: In the unlocked state the DO pin goes low and the UL bit in the serial data
Dead zone widths: DZA < DZB < DZC < DZD
Setting TBC to one causes an 8 Hz, 40% duty clock time base signal to be output
from the BO1 pin. (BO1 data is invalid in this mode.)
Note: If deadlock occurs due to the VCO control voltage (Vtune) going to zero and the VCO
DOC2
UL1
DZ1
DO pin
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
2. Goes to the open state if the I/O pin is specified to be an output port.
becomes zero.
oscillator stopping, deadlock can be cleared by forcing the charge pump output to
low and setting Vtune to V
high) will be open, regardless of the state of the DO control data (DOC0 to DOC2).
Also, the DO pin during a data output period (an OUT mode period with CE high)
will output the contents of the internal DO serial data in synchronization with the
CL pin signal, regardless of the state of the DO control data (DOC0 to DOC2).
DLC
0
1
DOC1
When end-UC is set and the IF counter is started (i.e., when CTE is changed
When the IF counter measurement completes, the DO pin goes low to indicate
Depending on serial data I/O (CE: high) the DO pin goes to the open state.
UL0
DZ0
from zero to one), the DO pin automatically goes to the open state.
the measurement completion state.
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Counter start
Stopped
0
±0.55 µs
±1.11
DZA
DZB
DZC
DZD
Normal operation
Forced low
DOC0
LC72133M, 72133V
0
1
0
1
0
1
0
1
øE detection width
Open
Low when the unlock state is detected
end-UC
Open
Open
The IO1 pin state
The IO2 pin state
Open
CC
. (This is the deadlock clearing circuit.)
Functions
*1
Charge pump output
Dead zone mode
*2
*2
Counter
complete
DO pin state
Open
øE is output directly
øE is extended by 1 to 2 ms
øE is extended by 1 to 2 ms
Detector output
CE: high
A11920
Continued on next page.
UL0, UL1,
CTE,
IOC1, IOC2
DOC0,
DOC1,
DOC2
BO1
Related data
No. 5427-11/23

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