lc72133m Sanyo Semiconductor Corporation, lc72133m Datasheet - Page 17

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lc72133m

Manufacturer Part Number
lc72133m
Description
Pll Frequency Synthesizer For Electronic Tuning
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
2. IF Counter Operation
IFIN minimum input sensitivity standard
Note: Values in parentheses are actual performance values presented as reference data.
1: Normal mode
0: Degradation mode
Before starting the IF count, the IF counter must be reset in advance by setting CTE in the serial data to 0.
The IF count is started by changing the CTE bit in the serial data from 0 to 1. The serial data is latched by the
LC72133 when the CE pin is dropped from high to low. The IF signal must be supplied to the IFIN pin in the period
between the point the CE pin goes low and the end of the wait time at the latest. Next, the value of the IF counter at
the end of the measurement period must be read out during the period that CTE is 1. This is because the IF counter is
reset when CTE is set to 0.
Note: When operating the IF counter, the control microprocessor must first check the state of the IF-IC SD (station
IFS
detect) signal and only after determining that the SD signal is present turn on IF buffer output and execute an
IF count operation. Autosearch techniques that use only the IF counter are not recommended, since it is
possible for IF buffer leakage output to cause incorrect stops at points where there is no station.
Frequency
measurement
period
(10 to 15 mVrms)
(0.5 to 5 mVrms)
CE
IFIN
0.4 ≤ f < 0.5
100 mVrms
70 mVrms
100 mVrms
0.5 ≤ f < 8
70 mVrms
Data with CTE = 1
LC72133M, 72133V
Wait time
(30 to 50 mVrms)
(2 to 10 mVrms)
100 mVrms
70 mVrms
8 ≤ f ≤ 12
Count start
f (MHz)
Measurement
period
GT
Count end (end-UC)
A11935
No. 5427-17/23

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