lc72137 Sanyo Semiconductor Corporation, lc72137 Datasheet

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lc72137

Manufacturer Part Number
lc72137
Description
Pll Frequency Synthesizer For Electronic Tuning
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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Ordering number : ENN5743B
Overview
The LC72137 and LC72137M are high input sensitivity
(FMIN: 10 mVrms at 130 MHz) PLL frequency
synthesizers for 3 V systems. They allow high-
performance AM/FM tuners to be implemented easily.
Features
• High-speed programmable frequency divider
• IF counter
• Reference frequency
• Phase comparator
• Built-in MOS transistor for forming an active low-pass
• I/O ports
• Serial Data I/O
— FMIN: 10 to 160 MHz ..Pulse swallower
— AMIN: 2 to 40 MHz ......Pulse swallower
— IFIN: 0.4 to 12 MHz ......For use as an AM/FM IF
— Selectable from one of eight frequencies (crystal
— Supports dead zone control
— Built-in unlock detection circuit
— Built-in deadlock clear circuit
— Dedicated output ports: 4
— I/O ports: 2
— Supports clock time base output
— Supports CCB format communication with the
filter
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
oscillator: 75 kHz)
1, 3, 5, 3.125, 6.25, 12.5, 15, and 25 kHz
system controller.
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
0.5 to 10 MHz ...Direct division
SANYO Electric Co.,Ltd. Semiconductor Company
(divide-by-two prescaler built in)
counter
• Operating ranges
• Packages
Package Dimensions
unit: mm
3059-DIP22S
unit: mm
3036B-MFP20
— Supply voltage: 2.5 to 3.6 V
— Operating temperature: –20 to +70°C
—DIP22S/MFP20
22
1
91099TH (OT)/N3098HA ( OT ) /70398RM ( OT ) No. 5743-1/22
0.95
PLL Frequency Synthesizer
20
1
0.48
0.35
21.2
for Electronic Tuning
LC72137, 72137M
12.6
[LC72137M]
[LC72137]
1.78
11
12
1.27
11
10
1.7
0.59
SANYO: DIP22S
0.15
SANYO: MFP20
CMOS IC

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lc72137 Summary of contents

Page 1

... Ordering number : ENN5743B Overview The LC72137 and LC72137M are high input sensitivity (FMIN: 10 mVrms at 130 MHz) PLL frequency synthesizers for 3 V systems. They allow high- performance AM/FM tuners to be implemented easily. Features • High-speed programmable frequency divider — FMIN 160 MHz ..Pulse swallower (divide-by-two prescaler built in) — ...

Page 2

... The circuit constants for the crystal oscillator circuit depend on the crystal used, the printed sircuit board pattem, and other items. Therefore we recommend consulting with the manfacturer of the crystal for evaluation and reliability. The extremely high input impedance of the XIN pins means that applications must take the possibility of leakage into account. LC72137, 72137M = ...

Page 3

... OFFH leakage current Low-level three-state off I OFFL leakage current Input capacitance Current drain LC72137, 72137M Conditions XIN FMIN AMIN IFIN FMIN AMIN XOUT CE, CL, DI, IO1, IO2 PD – PD BO1 to BO4, IO1, IO2 BO1 to BO4, IO1, IO2 ...

Page 4

... Pin Assignments Block Diagram LC72137, 72137M No. 5743-4/22 ...

Page 5

... Inputs serial data transferred from the controller to the LC72137. • Used as the synchronization clock when inputting (DI) or outputting (DO) serial data. • Outputs serial data transferred from the LC72137 to the controller. The data output is determined by the DOC0 to DOC2 bits in the serial data. • The LC72137 power supply pin ...

Page 6

... IFIN 10 (9) IF counter 1 (– Pin 22 (–) LC72137, 72137M Functions • Dedicated outputs • The output states are determined by the BO1 to BO4 bits in the serial data. Data open, 1= low • A time base signal (8 Hz) can be output from the BO1 pin. (When the serial data TBC bit is set to 1.) • ...

Page 7

... Serial Data I/O Procedures The LC72137 inputs and outputs data using the Sanyo CCB (computer control bus) audio IC serial bus format. This IC adopts an 8-bit address format CCB. I/O mode B0 1 IN1 (82 IN2 (92 OUT (A2) 0 LC72137, 72137M Address ...

Page 8

... DI Control Data (serial data input) Structure 1. IN1 Mode 2. IN2 Mode LC72137, 72137M No. 5743-8/22 ...

Page 9

... Data input mode output mode Output port data • BO1 to BO4, IO1, and IO2 output state data BO1 to BO4, IO1, IO2 Data open low (5) • “Data = 0: Open” is selected following a power-on reset. LC72137, 72137M Description SNS LSB Divisor setting (N) P0 272 to 65535 ...

Page 10

... 40% duty clock time base signal can be output from BO1 by setting TBC to 1. (9) TBC (The BO1 data will be ignored.) Charge pump control data • Data that forcibly controls the charge pump output DLC (10) Note: The LC72137 provides a technique for escaping from deadlock by setting Vtune to LC72137, 72137M Description DOC1 DOC0 DO pin state 0 0 ...

Page 11

... Control block/data IF counter control data • This data should be set normal operation. Setting this data to 0 switches (11) IFS the LC72137 to a reduced input sensitivity mode in which the sensitivity is reduced mVrms. LSI test data • IC test data TEST 0 to TEST2 ...

Page 12

... CL: Normal low Serial Data Output (OUT CL: Normal high 2. CL: Normal low Note: Since the DO pin is an n-channel open drain circuit, the times for the data to change (t resistor, printed circuit board capacitance. LC72137, 72137M , ≥ 0.75 µ < 0.75 µ ...

Page 13

... CE setup time hold time t EH Data latch change time Data output time t DH LC72137, 72137M CL Stopped at the Low Level CL Stopped at the High Level Pins Conditions DI CE, CL CE, CL CE, CL DO, CL These times depend on the pull-up resistance DO, CE and the printed circuit board capacitances ...

Page 14

... For a 9 kHz MW step size (DVS = 0, SNS = 0: AMIN low-speed side selected) • 1008 kHz (IF = +450 kHz) MW VCO = 1458 kHz PLL fref = 3 kHz ( 1458 kHz (MW VCO) 3 kHz (fref) = 486 LC72137, 72137M Set divisor Actual divisor: N 272 to 65535 Twice the set value ...

Page 15

... IF Counter Structure The LC72137 IF counter is a 20-bit binary counter, and takes the IF signal from the IFIN pin as its input. The result of the count can be read out serially, MSB first, from the DO pin. Measurement time GT1 GT0 Measurement period (GT) (ms ...

Page 16

... Before starting the IF count, the IF counter must be reset in advance by setting CTE in the serial data to 0. The IF count is started by changing the CTE bit in the serial data from The serial data is latched by the LC72137 when the CE pin is dropped from high to low. The IF signal must be supplied to the IFIN pin in the period between the point the CE pin goes low and the end of the wait time at the latest ...

Page 17

... N (frequency) unlock detection must be performed after waiting at least two periods of the reference frequency. For example, if fref is 1 kHz (and thus the period is 1 ms), after changing the divisor N, the system must wait at least 2 ms before checking for the unlocked state. LC72137, 72137M Figure 1 Unlock Detection Timing Figure 2 Circuit Structure No. 5743-17/22 ...

Page 18

... Unlock Detection Software 3. When Outputting Unlock Data Using Serial Data Output: Once the LC72137 detects an unlocked state, it does not reset the unlock data (UL) until the next data output (or data input) operation is performed. At the data output the unlock data remains set to the unlocked state since no data output has been performed since the value of N was changed ...

Page 19

... ON/ON state, the loop can easily become unstable. This point requires special care when designing application circuits. The following problems may occur in the ON/ON state. • Side band generation due to reference frequency leakage • Side band generation due to both the correction pulse envelope and low frequency leakage LC72137, 72137M Charge pump Dead zone ON/ON – –0 s ON/ON – ...

Page 20

... IF-IC SD (station detect) signal and turn on the IF counter buffer only if the SD signal is present. Schemes in which auto-searches are performed with only IF counting are not recommended, since they can stop at points where there is no signal due to leakage output from the IF counter buffer. LC72137, 72137M Figure 4 Figure 5 ...

Page 21

... Since this product is designed with the relatively high resistance of 200 kΩ for the pull-down (on) resistors built in to the FMIN and AMIN pins, a common AM/FM local oscillator buffer can be used as shown in the following circuit. FM OSC AM OSC FE Pin States at a Power-On Reset LC72137, 72137M and temporarily to prevent the PLL from being CC ...

Page 22

... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of September, 1999. Specifications and information herein are subject to change without notice. LC72137, 72137M PS. No. 5743-22/22 ...

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