lc7219m Sanyo Semiconductor Corporation, lc7219m Datasheet - Page 10

• Manufacturer Part Number: lc7219m
• Description: Pll Frequency Synthesizers
• Manufacturer: Sanyo Semiconductor Corporation

Using DO to monitor for measurement completion
DO can be used to monitor for frequency or period measurement completion as shown in figure 11.
Notes
1. Setting CTEN to 1 sets DO HIGH and prevents IN0 from affecting DO.
2. DO goes LOW when the measurement is complete.
Phase-locked Loop
Reading the PLL unlock flags
The PLL unlock flags are set on the rising edge of the internal
signal. In serial data output mode, the flags set since the last rising edge of CE can be read. This is the interval t
shown in figure 12.
Each PLL unlock flag is set if the corresponding time interval is exceeded as follows.
The flag values for different error ranges, where
UL0 is set when
UL1 is set when
UL2 is set when
UL3 is set when
If
If 0.55 s
If 1.11 s
If 2.22 s
If 3.33 s
ERROR
<0.55 s, UL=0000
ERROR,
ERROR
ERROR
ERROR
ERROR
ERROR
ERROR
ERROR
<1.11 s, UL=1000
<2.22 s, UL=1001
<3.33 s, UL=1011
UL=1111
1.11 s
2.22 s
3.33 s
0.55 s
Figure 11. Measurement completion timing
Figure 12. PLL unlock flag timing
LC7219, 7219M
ERROR
is the phase error for the 7.2MHz crystal, are as follows.
ERROR
signal and cleared on the rising edge of the CE
No.3661–10/12
0
to t
1