MM74HCT32M Fairchild Semiconductor, MM74HCT32M Datasheet

IC GATE OR QUAD 2-INPUT 14-SOIC

MM74HCT32M

Manufacturer Part Number
MM74HCT32M
Description
IC GATE OR QUAD 2-INPUT 14-SOIC
Manufacturer
Fairchild Semiconductor
Series
74HCTr
Datasheet

Specifications of MM74HCT32M

Logic Type
OR Gate
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
4.8mA, 4.8mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Product
OR
Logic Family
74HC
High Level Output Current
- 4.8 mA
Low Level Output Current
4.8 mA
Propagation Delay Time
20 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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©1987 Fairchild Semiconductor Corporation
MM74HCT32 Rev. 1.3.0
MM74HCT32
Quad 2-Input OR Gate
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
MM74HCT32M
MM74HCT32SJ
MM74HCT32MTC
MM74HCT32N
TTL, LS pin-out and threshold compatible
Fast switching: t
Low power: 10µW at DC
High fan-out, 10 LS-TTL loads
Order Number
All packages are lead free per JEDEC: J-STD-020B standard.
PLH
, t
PHL
Package
Number
MTC14
M14A
M14D
N14A
10ns (typ.)
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
General Description
The MM74HCT32 is a logic function fabricated by using
advanced silicon-gate CMOS technology, which pro-
vides the inherent benefits of CMOS—low quiescent
power and wide power supply range. This device is input
and output characteristic and pin-out compatible with
standard 74LS logic families. All inputs are protected
from static discharge damage by internal diodes to V
and ground.
MM74HCT devices are intended to interface between
TTL and NMOS components and standard CMOS
devices. These parts are also plug-in replacements for
LS-TTL devices and can be used to reduce power
consumption in existing designs.
Package Description
February 2008
www.fairchildsemi.com
CC

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MM74HCT32M Summary of contents

Page 1

... Package Order Number Number MM74HCT32M M14A MM74HCT32SJ M14D MM74HCT32MTC MTC14 MM74HCT32N N14A Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1987 Fairchild Semiconductor Corporation MM74HCT32 Rev. 1.3.0 ...

Page 2

... Connection Diagram Logic Diagram ©1987 Fairchild Semiconductor Corporation MM74HCT32 Rev. 1.3.0 Pin Assignments for DIP, SOIC, SOP and TSSOP 2 www.fairchildsemi.com ...

Page 3

... Symbol V Supply Voltage Input or Output Voltage IN OUT T Operating Temperature Range Input Rise or Fall Times r f ©1987 Fairchild Semiconductor Corporation MM74HCT32 Rev. 1.3.0 (1) Parameter Parameter 3 Rating –0.5 to +7.0V –1 +1.5V CC –0 +0.5V CC ±20mA ±25mA ±50mA –65°C to +150°C ...

Page 4

... Maximum Propagation Delay PLH PHL Maximum Output Rise & Fall Time THL TLH C Power Dissipation Capacitance PD C Input Capacitance IN Note determines the no load dynamic power consumption current consumption ©1987 Fairchild Semiconductor Corporation MM74HCT32 Rev. 1.3.0 Conditions 20µ OUT 4.0mA OUT V 4 ...

Page 5

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 6

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 7

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 8

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 9

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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