hd66710 Renesas Electronics Corporation., hd66710 Datasheet
hd66710
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hd66710 Summary of contents
Page 1
... This achieves various display forms. The HD66710 character generator ROM is extended to generate 240 5 8 dot characters. The low voltage version (2.7V) of the HD66710, combined with a low power mode, is suitable for any portable battery-driven product requiring low power dissipation. Features ...
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... Character 1 1/17 5 8-dot 2 1/33 5 8-dot 4 1/33 5 8-dot Ordering Information Type No. Package HD66710A00FS QFP1420-100 (FP-100A) HD66710A00TF TQFP1414-100 (TFP-100B) HCD66710A00 Chip 292 Maximum Number of Displayed Characters Single-Chip Operation One 16-character line + 40 segments Two 16-character lines + 40 segments Four 8-character lines + 40 segments CGROM Japanese standard ...
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... Hz to 106 Hz for 1/33 for 1/11 duty cycle) duty cycle 5 5-V operation; operation (3 3-V operation) operation) None 2-3 times step- up circuit HD66710 HD66712U 2.7V to 5.5V 2.7V to 11.0V 24 characters 2 lines/ 12 characters 4 lines 60 segments 1/17 and 1/33 9,600 bits (240 5 8 dot characters) 64 bytes 80 bytes ...
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... Bus interface 4 bits/8 bits CPU bus timing 2 MHz: 5-V operation; 1 MHz: 3-V operation Package QFP-1420-80 80-pin bare chip 294 HD66702R HD66710 Independent Used in common control signal with a driver output pin Power on Power on automatic reset automatic reset Fully compatible Upper compatible with the LCD-II ...
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... HD66710 Block Diagram Reset circuit ACL 8 RS MPU interface R DB4–DB7 register Input/ output DB3–DB0 buffer Busy flag Vci C1 Booster C2 V5OUT2 V5OUT3 V CC GND V1 OSC1 OSC2 EXT CPG Timing generator 7 Instruction register Instruction (I R) decoder Display data RAM (DDRAM) ...
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... HD66710 HD66710 Pin Arrangement 100 SEG27 1 SEG28 2 3 SEG29 SEG30 4 SEG31 5 SEG32 6 SEG33 7 SEG34 8 SEG35 9 SEG36 10 SEG37/CL1 11 SEG38/CL2 12 SEG39/D 13 SEG40/M 14 COM9 15 COM10 16 COM11 17 COM12 18 COM13 19 COM14 20 COM15 21 COM16 22 COM25 23 COM26 24 COM27 25 COM28 ...
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... HD66710 Pin Arrangement (TQFP1414-100 Pin) 100 SEG29 1 SEG30 2 SEG31 3 SEG32 4 SEG33 5 SEG34 6 SEG35 7 SEG36 8 SEG37/CL1 9 SEG38/CL2 10 SEG39/D 11 SEG40/M 12 COM9 13 COM10 14 COM11 15 COM12 16 COM13 17 COM14 18 COM15 19 COM16 20 COM25 21 COM26 22 COM27 23 COM28 24 COM29 25 26 ...
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... HD66710 HD66710 Pad Arrangement 1 100 298 Chip size ( 5. Pad center Coordinate Origin : Chip center Pad size ( 100 m 100 HD66710 Type code ...
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... HD66710 Pad Location Coordinates Pin No. Pad Name X 1 SEG27 –2495 2 SEG28 –2695 3 SEG29 –2695 4 SEG30 –2695 5 SEG31 –2695 6 SEG32 –2695 7 SEG33 –2695 8 SEG34 –2695 9 SEG35 –2695 10 SEG36 –2695 11 SEG37 –2695 12 SEG38 –2695 13 SEG39 –2695 14 SEG40 –2695 15 COM9 –2695 16 COM10 –2695 17 COM11 – ...
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... Read Starts data read/write Four high order bidirectional tristate data bus pins. Used for data transfer between the MPU and the HD66710. DB7 can be used as a busy flag. Four low order bidirectional tristate data bus pins. Used for data transfer between the MPU and the HD66710. These pins are not used during 4-bit operation. Common signals ...
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... Voltage input to the Vci pin is boosted twice and output When the voltage is boosted three times, the same capacity as that of C1–C2 should be connected. Voltage input to the Vci pin is boosted three times and output. External capacitance should be connected when using the booster. Test pin. Should be wired to ground. HD66710 301 ...
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... DR for the next read from the MPU. By the register selector (RS) signal, these two registers can be selected (Table 2). Busy Flag (BF) When the busy flag is 1, the HD66710 is in the internal operation mode, and the next instruction will not : be accepted. When and R/ must be written after ensuring that the busy flag is 0 ...
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... When there are fewer than 80 display characters, the display begins at the head position. For example, if using only the HD66710, 16 characters are displayed. See Figure 3. When the display shift operation is performed, the DDRAM address shifts. See Figure 3. High order ...
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... Figure 4 2-line by 16-Character Display Example Case 2: Figure 5 shows the case where the EXT pin is fixed to high, the HD66710 and the 40- output extension driver are used to extend the number of display characters. In this case, the start address from COM9 to COM16 of the HD66710 is 0AH, and that from COM25 to COM32 of the HD66710 is 4AH ...
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... COM16, the third line is displayed from COM17 to COM24, and the fourth line is displayed from COM25 to COM32. Care is required because the DDRAM addresses of each line are not consecutive. For example, the case is shown in Figure 6 where 8 using the HD66710. When a display shift operation is performed, the DDRAM address shifts. See Figure 6. COM1 to 8 ...
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... HD66710 Case 2: The case is shown in figure where the EXT pin is fixed high, and the HD66710 and the 40-output extension driver are used to extend the number of display characters. When a display shift operation is performed, the DDRAM address shifts. See Figure ...
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... If there are no problems within the character pattern listing, a trial LSI is created at Hitachi and samples are sent to the user for evaluation. When it is confirmed by the user that the character patterns are correctly written, mass production of the LSI will proceed at Hitachi. 8 dot character patterns from 8-bit character codes (Table 3). HD66710 8 307 ...
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... HD66710 Create character No Note: For a description of the numbers used in this figure, refer to the preceding page. Figure 8 Character Pattern Development Procedure 308 Hitachi User Start Computer Determine processing character patterns Create EPROM 5 pattern listing address data listing Evaluate Write EPROM character patterns ...
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... Bits CG RAM xxxx0000 (1) (2) xxxx0001 xxxx0010 (3) (4) xxxx0011 (5) xxxx0100 (6) xxxx0101 (7) xxxx0110 (8) xxxx0111 xxxx1000 (1) xxxx1001 (2) (3) xxxx1010 (4) xxxx1011 (5) xxxx1100 (6) xxxx1101 (7) xxxx1110 xxxx1111 (8) Note: The user can specify any pattern in the character-generator RAM. HD66710 1000 1001 1010 1011 1100 1101 1110 1111 309 ...
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... HD66710 Programming character patterns This section explains the correspondence between addresses and data used to program character patterns in EPROM. The HD66710 character generator ROM can generate 240 5 patterns. Character patterns EPROM address data and character pattern data correspond with each other to form dot character pattern (Table 4) ...
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... EPROM data in CGRAM area: Always fill with zeros. (EPROM addresses 00H to FFH.) 3. Treatment of unused user patterns in the HD66710 EPROM: According to the user application, these are handled in either of two ways: a. When unused character patterns are not programmed unused character code is written into DDRAM, all its dots are lit, because the EPROM is filled with 1s after it is erased ...
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... HD66710 Table 5 Example of Correspondence between Character Code and Character Pattern (5 Dots) in CGRAM (cont) b) When Character Pattern in 6 Character code (DDRAM data Notes: 1. Character code bits correspond to CGRAM address bits bits: 8 types). ...
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... B1 B0 S31 S32 S33 S34 S35 S36 * B1 B0 S31 S32 S33 S34 S35 B1 B0 S37 S38 S39 S40 S41 S42 * S36 S37 S38 S39 S40 B1 B0 S43 S44 S45 S46 S47 S48 Pattern on/off Blinking control HD66710 Pattern on/off 313 ...
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... HD66710 i) 5-dot font width ( ii) 6-dot font width ( Figure 9 Relationships between SEGRAM Data and Display 314 S40 S10 S8 S37 S38 S7 S36 S39 S47 S11 S8 S9 S12 S43 S44 S45 S48 S1 S2 S10 S46 < ...
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... RAM (DDRAM). Since serial data is latched when the display data character pattern corresponding to the starting address enters the internal shift register, the HD66710 drives from the head display. Cursor/Blink Control Circuit The cursor/blink (or white-black inversion) control is used to produce a cursor or a flashing area on the display at a position corresponding to the location in stored in the address counter (AC) ...
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... HD66710 For a 1-line display Display position DDRAM address (hexadecimal) For a 2-line display Display position DDRAM address (hexadecimal) Note: Even if the address counter (AC) points to an address in the character generator RAM (CGRAM) or segment RAM (SEGRAM), cursor/blink black-white inversion will still occur, although it will produce meaningless results ...
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... For 4-bit interface data, only four bus lines (DB4 to DB7) are used for transfer. Bus lines DB0 to DB3 are disabled. The data transfer between the HD66710 and the MPU is completed after the 4-bit data has been transferred twice. As for the order of data transfer, the four high order bits (for 8-bit operation, DB4 to DB7) are transfered before the four low order bits (for 8-bit operation, DB0 to DB3) ...
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... Note: If the electrical characteristics conditions listed under the table Power Supply Conditions Using Internal Reset Circuit are not met, the internal reset circuit will not operate normally and will fail to initialize the HD66710. For such a case, initialization must be performed by the MPU as explained in the section, Initializing by Instruction. ...
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... Because the busy flag is set to 1 while an instruction is being executed, check it to make sure before sending another instruction from the MPU. Note: Be sure the HD66710 is not in the busy state ( before sending an instruction from the MPU to the HD66710 instruction is sent without checking the busy flag, the time between the first instruction and next instruction will take much longer than the instruction time itself ...
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... HD66710 Table 7 Instructions Code : : Instruction RS R/ DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description Clear display Return home Entry mode set Display on/off control ( Extension function set ( Cursor or ...
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... CGRAM, clear read data from SEGRAM, set DDRAM: CGRAM: Character SEGRAM: Segment RAM ACG: CGRAM address ADD: DDRAM address ASEG: Segment RAM HDS: Horizontal dot scroll AC: HD66710 Execution Time (max) (when 270 kHz) OSC 0 µs 37 µ 5.5 µ ...
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... HD66710 Busy state (DB7 pin) Address counter (DB0 to DB6 pins) Note: t depends on the operation frequency ADD t = 1.5/(f ADD Figure 12 Address Counter Update 322 Busy state A t ADD seconds cp OSC ...
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... C: The cursor is displayed when and not displayed when Even if the cursor disappears, the function of I/D or other specifications will not change during display data write. The cursor is displayed using 5 dots in the 8th line for 5 8 dot character font. HD66710 323 ...
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... HD66710 B: The character indicated by the cursor blinks when (Figure 13). The blinking is displayed as switching between all blank dots and displayed characters at a speed of 370-ms intervals when f 270 kHz. The cursor and blinking can be set to display simultaneously. (The blinking frequency changes according to f ...
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... Shifts the cursor position to the right. (AC is incremented by one Shifts the entire display to the left. The cursor follows the display shift Shifts the entire display to the right. The cursor follows the display shift. i) 5-dot character width ii) 6-dot character width HD66710 325 ...
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... LP: When the RE bit is 1, this bit can be rewritten. When LP is set to 1 and the EXT pin is low (without an extended driver), the HD66710 operates in low power mode. In 1-line display mode, the HD66710 operates on a 4-division clock, and in a 2-line or a 4-line display mode, the HD66710 operates division clock. According to these operations, instruction execution takes four times or twice as long. ...
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... Shift the display position to the left by one dot. Shift the display position to the left by two dots. Shift the display position to the left by three dots. Shift the display position to the left by four dots. Shift the display position to the left by five dots. No shift. HD66710 327 ...
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... HD66710 RS Clear Code 0 display RS Return 0 Code home RS Entry 0 Code mode set RS Display 0 Code on/off control Extended 0 function set Code RS Cursor or Code 0 display shift RS Function set Code 0 RS Set CGRAM address Code Figure 15 Character Width Control 328 R/W DB7 DB6 DB5 ...
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... Figure 15 Character Width Control (cont) DB5 DB4 DB3 DB2 DB1 DB0 Lowest order bit DB5 DB3 DB4 DB2 DB1 DB0 HS1 HS0 * DB5 DB4 DB3 DB2 DB1 DB0 Lowest order bit HD66710 329 ...
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... HD66710 Write Data to CG, DD, or SEGRAM This instruction writes 8-bit binary data DDDDDDDD to CG SEGRAM. If the RE bit is cleared DDRAM is selected, as determined by the previous specification of the address set instruction; if the RE bit is set, SEGRAM is selected. After a write, the address is automatically incremented or decremented by 1 according to the entry mode ...
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... Interfacing the HD66710 1) Interface to 8-Bit MPUs HD66710 can interface to 8-bit MPU directly with E clock 8-bit MCU through I/O port. When number of I/O port in MCU, or interfacing bus width, 4-bit interface function is useful. RS R/W E Internal signal DB7 Data Instruction write Figure 16 Example of 8-Bit Data Transfer Timing Sequence ...
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... HD66710 2) Interface to 4-Bit MPUs HD66710 can interface to 4-bit MCU through I/O port. 4-bit data for high and low order must be transferred twice continuously. The DL bit in function set selects the interface data length. RS R/W E Internal signal DB7 IR7 IR3 Instruction write Figure 18 Example of 4-Bit Data Transfer Timing Sequence ...
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... Normal Display Mode ( Low Power Mode ( 5-Dot Font Width 6-Dot Font Width 5-Dot Font Width 100 clocks 120 clocks 50 clocks 81.8 Hz 68.2 Hz 81.8 Hz Figure 21 Frame Frequency HD66710 5V 3V 6-Dot Font Width 60 clocks 66 6-Dot Font Width 60 clocks 68 ...
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... HD66710 Power Supply for Liquid Crystal Display Drive 1) When an external power supply is used 2) When an internal booster is used (Boosting twice NTC-type thermistor GND V5OUT2 V5OUT3 GND Notes: 1. Boosting output voltage should not exceed the power supply voltage (2) (13V max.) in the absolute maximum ratings ...
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... Table 11 Duty Factor and Power Supply for Liquid Crystal Display Drive Item Number of Lines Duty factor Bias Divided resistance R R0 Note: R changes depending on the size of liquid crystal penel. Normally, R must be 4.7 k Data 1 2/4 1/17 1/33 1/5 1/6 2.7R HD66710 335 ...
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... From these pins, a latch pulse (CL1), a shift clock (CL2), data (D), and an AC signal (M) are output. The same data is output from the SEG36 pin of the HD66710 and the start segment pin (Seg1) of the extension driver. Due to the character baundary, the Seg1 output is used for the 5-dot font width ...
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... When using one HD66710, the start address of COM9–COM16/COM25–COM33 is calculated by adding 8 to the start address of COM9–COM16 COM25–COM32. When extending the address, the start address is calculated by adding A(10) to COM9–COM16/COM25 to COM32. The relationship betweenmodes and display start addresses is shown below. ...
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... COM13 COM14 COM15 COM16 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32 EXT b) 16 Figure 23 Liquid Crystal Display and HD66710 Connections (Single-Chip Operation) 338 1-line + 40-segment display (5-dot font, 1/17 duty – 2-line + 40-segment display (5-dot font, 1/33 duty) ...
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... COM25 COM26 COM27 COM28 COM29 COM30 EXT COM31 COM32 a) 12 2-line + 36-segment display (6-dot font, 1/33 duty) Figure 24 Liquid Crystal Display and HD66710 Connections (6-Dot Font Width Note: The DDRAM address between 6th and 7th digits is not contiguous. = HD66710 339 ...
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... Display shifts are performed on all lines simultaneously. Note: When using the internal reset, the electrical characteristics in the Power Supply Conditions Using Internal Reset Circuit table must be satisfied. If not, the HD66710 must be initialized by instructions. See the section, Initializing by Instruction. 340 ...
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... Table 14 8-Bit Operation, 16-Digit Instruction Step : : No Power supply on (the HD66710 is initialized by the internal reset circuit) 2 Function set Display on/off control Entry mode set Write data to CGRAM/DDRAM ...
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... HD66710 Table 14 8-Bit Operation, 16-Digit Instruction Step : : No Write data to CGRAM/DDRAM · · · · · 13 Write data to CGRAM/DDRAM Cursor or display shift Cursor or display shift Write data to CGRAM/DDRAM ...
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... Table 15 4-Bit Operation, 16-Digit Instruction Step : : No Power supply on (the HD66710 is initialized by the internal reset circuit) 2 Function set — — — — — — 3 Function set Function set ...
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... HD66710 Table 16 8-Bit Operation, 16-Digit Instruction Step : : No Power supply on (the HD66710 is initialized by the internal reset circuit) 2 Function set Display on/off control Entry mode set Write data to CGRAM/DDRAM ...
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... MICROCO_ HITACHI MICROCO_ ITACHI ICROCOM_ · · · · · HITACHI MICROCOM HD66710 Operation Writes a space. Writes O. Sets mode to shift display at the time of write. Writes M. Returns both display and cursor to the original position (address 0). 345 ...
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... HD66710 Table 17 8-Bit Operation, 8-Digit Instruction Step : : No Power supply on (the HD66710 is initialized by the internal reset circuit) 2 Function set 4-line mode set Function set Clear extended register enable bit ...
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... Write data to CGRAM/DDRAM 4-Line Display Example with Internal Reset (cont Display HITACHI_ HITACHI HITACHI HD66710 Operation Writes I. Sets RAM address so that the cursor is positioned at the head of the second line. Writes 0. 347 ...
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... HD66710 Initializing by Instruction If the power supply conditions for correctly operating the internal reset circuit are not met, initialization by instructions becomes necessary. Power on • Wait for more than 15 ms after V rises to 4. 5V) CC • Wait for more than 40 ms after V rises to 2.7V CC ...
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... Function set (4-bit mode, N specification Display off Display clear Entry mode set (I/D, S specification I/D S Initialization ends Figure 26 4-Bit Interface HD66710 BE, LP are clear to “0” 349 ...
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... HD66710 Horizontal Dot Scroll Dot unit shifts are performed by setting the horizontal dot scroll bit (HDS) when the extension register is enabled (RE = 1). By combining this with character unit display shift instructions, smooth horizontal scrolling can be performed on a 6-dot font width display as shown below. ...
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... Shift the whole display to the left by five dots * Shift the whole display to the left by four dots * Shift the whole display to the left by three dots * Shift the whole display to the left by two dots * Shift the whole display to the left by one dot * Perform no shift * HD66710 351 ...
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... HD66710 Low Power Mode When LP bit is 1 and the EXT pin is low (without an extended driver), the HD66710 operates in low power mode. In 1-line display mode, the HD66710 operates on a 4-division clock, and in 2-line or 4-line display mode, it operates on 2-division clock. So, instruction execution takes four times or twice as long. ...
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... If these electrical characteristic conditions are also exceeded, the LSI will malfunction and cause poor reliability. * Refer to the Electrical Characteristics Notes section following these tables. Value Unit –0.3 to +7.0 V –0.3 to +15.0 V –0 +0 –20 to +75 °C –55 to +125 °C HD66710 Notes 353 ...
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... HD66710 DC Characteristics (V = 2.7V to 5.5V Item Symbol Min Input high voltage (1) VIH1 0.7V (except OSC1) Input low voltage (1) VIL1 –0.3 (except OSC1) –0.3 Input high voltage (2) VIH2 0.7V (OSC1) Input low voltage (2) VIL2 — (OSC1) Output high voltage (1) VOH1 0.75V (D0–D7) Output low voltage (1) VOL1 — ...
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... — — — — — — — — 360 DDR t 5 — — DHR HD66710 3 ) Unit Test Condition Notes* kHz 11 % µs µs kHz Unit Test Condition ns Figure 30 Unit Test Condition ns Figure 31 ...
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... HD66710 Bus Timing Characteristics (2) (V Write Operation Item Enable cycle time Enable pulse width (high level) Enable rise/fall time : Address set-up time (RS Address hold time Data set-up time Data hold time Read Operation Item Enable cycle time Enable pulse width (high level) ...
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... OFF Pins: RS, R/W (MOS with pull-up PMOS PMOS (pull up MOS) NMOS (input circuit) PMOS PMOS Input enable NMOS V CC NMOS PMOS NMOS (output circuit) (tristate) HD66710 Max Unit Test Condition 10 ms Figure 33 — V5 must be maintained. Output enable data 357 ...
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... HD66710 6. Applies to input pins and I/O pins, excluding the OSC1 pin. 7. Applies to I/O pins. 8. Applies to output pins. 9. Current flowing through pull-up MOSs, excluding output drive MOSs. 10. Input/output current is excluded. When input intermediate level with CMOS, the excessive current flows through the input circuit to the power supply. To avoid this from happening, the input level must be fixed high or low ...
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... OSC pin must also be connected to the CC Boosting three times V Rload Vci V5OUT2 V5OUT3 GND HD66710 = 3V CC max. typ. typ. (LP mode) 300 400 500 or f (kHz V1, V2, V3, V4, V5) CC Rload 359 ...
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... HD66710 19. Reference data The following graphs show the liquid crystal voltage booster characteristics. VUP2 = V –V5OUT2 CC VUP3 = V –V5OUT3 CC (1) VUP2, VUP3 vs Vci Boosting twice 2.0 3.0 Vci (V) Test condition: Vci = Rload = (2) VUP2, VUP3 Boosting twice 9 ...
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... AC Characteristics Test Load Circuits Data bus: DB0–DB7 Test point 50 pF Boosting three times typ. 8.0 min. 7.5 7.0 6.5 6.0 1.0 1.5 0 4.5V Test condition: Vci = 0. Segment extension signals: CL1, CL2 Test point HD66710 typ. min. 1 361 ...
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... HD66710 Timing Characteristics VIH1 RS VIL1 R/W VIL1 E DB0 to DB7 VIH1 RS VIL1 VIH1 R/W E DB0 to DB7 Note: VOL1 is assumed MHz operation. 362 VIH1 VIL1 VIH1 VIH1 VIL1 VIL1 DSW H VIH1 VIH1 Valid data VIL1 VIL1 ...
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... If the above electrical conditions are not satisfied, the internal reset circuit will not operate normally. In this case, the LSI must be initialized by software. (Refer to the Initializing by Instruction section.) Figure 33 Power Supply Sequemce t ct VOL2 t CWL t ct VOH2 VOL2 VOL2 t DM 0.2V 0.2V t OFF * OFF HD66710 363 ...