s3c2800 Samsung Semiconductor, Inc., s3c2800 Datasheet

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s3c2800

Manufacturer Part Number
s3c2800
Description
32-bit Risc Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S3C2800
32-BIT RISC MICROPROCESSOR
DATA SHEET
Revision 1.0

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s3c2800 Summary of contents

Page 1

... S3C2800 32-BIT RISC MICROPROCESSOR DATA SHEET Revision 1.0 ...

Page 2

... Samsung assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation any consequential or incidental damages. S3C2800 32-Bit Microprocessor Data Sheet, Revision 1.0 Publication Number: 11.0-S3-C2800-072002 © 2002 Samsung Electronics All rights reserved ...

Page 3

... GPIO (General-Purpose Input/Output) ports, RTC (Real Time Clock), 2-ch IIC-BUS interface, and a built-in PLL for system clock. Based on ARM920T core, the S3C2800 is developed using 0.18 um CMOS standard cells and a memory compiler. Its simple, elegant, and fully static low-power design is particularly suitable for both cost-sensitive and power-sensitive applications ...

Page 4

... S3C2800 MICROCONTROLLER FEATURES Architecture · Little-/Big-endian support for external memory. Address space: 32Mbytes per each bank (Total 256Mbyte) Supports programmable 8/16/32-bit data bus width for each memory bank Fixed bank start address for all (static memory and dynamic memory banks) 8 memory banks – ...

Page 5

... Alarm interrupt Time tick interrupt GPIO (General-Purpose Input/Output) Ports 8 external interrupt ports 44 multiplexed input/output ports. S3C2800 MICROCONTROLLER UART 2-channel UART with DMA-based or interrupt based operation Supports 5-bit, 6-bit, 7-bit, or 8-bit serial data transmit/receive Supports hardware handshaking during transmit/receive operation Programmable baud rates (up to 230 ...

Page 6

... A[31:0] IV A[31:0] ARM9TDMI Processor core (Integral EmbeddedICE) Write buffer AMBA bus Interface ASB to AHB bus Bridge AHB to APB Bridge AHB to APB Bridge Figure 1. S3C2800 Block Diagram DATA SHEET Instruction MMU Instruction cache External coproc interface BUS Controller Arbiter/Decode Interrupt Controller Clock(PLL) & ...

Page 7

... VSS3OP 42 DATA29 43 DATA30 44 DATA31 45 nOE 46 nWE 47 GPB6/nWAIT 48 GPB7/CLKout 49 GPC0 50 GPC1 51 GPC2 52 Figure 2. S3C2800 Pin Assignment (208-LQFP) S3C2800X 208-LQFP VDD/VSS : Internal 1.8V power AVDD/AVSS : Analog 1.8V Power VDD3OP/VSS3OP : I/O 3.3V power S3C2800 MICROCONTROLLER 156 PCI_AD6 155 PCI_AD7 154 PCI_C0/nBE0 153 VDD3OP 152 PCI_AD8 151 PCI_AD9 150 ...

Page 8

... S3C2800 MICROCONTROLLER PIN ASSIGNMENTS I/O Type vdd1ih, vss3I 1.8V power/ground for internal logic vdd1ih_pci, vss3I_pci vdd1t_abb, vss1t_abb 1.8V power/ground for analog circuitry vdd3op, vss3op 3.3V power/ground for external interface logic vdd3op_pci, vss3op_pci poar50_abb 1.8V analog output (A capacitor is connected between the pin and analog ground) phsoscm16 Oscillator cell width enable and feedback resistor (6 M – 40 MHz) phsosck17 Oscillator cell width enable and feedback resistor (– ...

Page 9

... SDCKE SDCLK DQM0 DQM1 DQM2 DQM3 DATA16 ADDR16 DATA17 ADDR17 DATA18 ADDR18 VDD3OP VSS3OP DATA19 ADDR19 DATA20 ADDR20 VDD VSS DATA21 ADDR21 DATA22 ADDR22 DATA23 ADDR23 DATA24 S3C2800 MICROCONTROLLER I/O TYPE O/IO phbsu50ct8sm O/IO P vdd3op P vss3op O/IO phbsu50ct8sm O/IO O/IO O/IO O phob8 O phob12 O/IO phbsu50ct8sm O/IO O/IO O/IO I/O phbsu50ct12sm O phot8 I/O phbsu50ct12sm ...

Page 10

... S3C2800 MICROCONTROLLER Table 2. 208-Pin LQFP Pin Assignment (Continued) Pin # Pin Name 36 ADDR24 37 DATA25 38 DATA26 39 DATA27 40 DATA28 41 VDD3OP 42 VSS3OP 43 DATA29 44 DATA30 45 DATA31 46 nOE 47 nWE 48 GPB6/nWAIT 49 GPB7/CLKout 50 GPC0 51 GPC1 52 GPC2 53 GPC3/ENDIAN 54 nTRST 55 TCK 56 TMS 57 TDI 58 TDO 59 IRIN 60 GPD0/IICSDA0 61 GPD1/IICSCLK0 62 GPD2/IICSDA1 63 GPD3/IICSCLK1 64 GPD4/RxD0 65 GPD5/TxD0 ...

Page 11

... GPF7 IO VDD3OP P VSS3OP P XTAL0 AI(3) EXTAL0 AO(3) TEST I nRESET I XTAL1 I EXTAL1 O OM0 I(1) OM1 I(1) AVDD P PLLCAP AO(3) AVSS P PCI_nRST I PCI_CLK I PCI_nGNT1 IO PCI_nGNTx2 O PCI_nGNTx3 O PCI_nREQ1 IO S3C2800 MICROCONTROLLER I/O TYPE phbsu50ct8sm vdd1ih vss3i phbsu50ct8sm vdd3op vss3op phsoscm16 phis phisu phsosck17 phis vdd1t_abb poar50_abb vss1t_abb/vbb1_abb ptipci ptbpci ptopci ptbpci 9 ...

Page 12

... S3C2800 MICROCONTROLLER Table 2. 208-Pin LQFP Pin Assignment (Continued) Pin # Pin Name 106 VSS3OP 107 PCI_nREQx2 108 PCI_nREQx3 109 PCI_AD31 110 PCI_AD30 111 PCI_AD29 112 PCI_AD28 113 VDD3OP 114 PCI_AD27 115 PCI_AD26 116 PCI_AD25 117 PCI_AD24 118 VSS3OP 119 PCI_C3/nBE3 120 PCI_IDSEL ...

Page 13

... VSS3OP P PCI_AD4 I/O PCI_AD3 I/O PCI_AD2 I/O PCI_AD1 I/O PCI_AD0 I/O PCI_nINTA I/O(2) DATA0 I/O ADDR0 O DATA1 I/O ADDR1 O DATA2 I/O ADDR2 O DATA3 I/O ADDR3 O VDD3OP P VSS3OP P DATA4 I/O S3C2800 MICROCONTROLLER I/O TYPE ptbdpci ptbpci vss3op_pci ptbpci vdd3op_pci ptbpci vss3op_pci ptbpci phbsud4 phbsu50ct12sm phot8 phbsu50ct12sm phot8 phbsu50ct12sm phot8 phbsu50ct12sm phot8 vdd3op vss3op phbsu50ct12sm 11 ...

Page 14

... S3C2800 MICROCONTROLLER Table 2. 208-Pin LQFP Pin Assignment (Continued) Pin # Pin Name 176 ADDR4 177 DATA5 178 ADDR5 179 DATA6 180 ADDR6 181 DATA7 182 ADDR7 183 DATA8 184 ADDR8 185 DATA9 186 ADDR9 187 VDD 188 VSS 189 DATA10 190 ADDR10 ...

Page 15

... DQM[3:0] O SDRAM Data Mask. SDCLK O SDRAM Clock (SDCLK = HCLK). SDCKE O SDRAM Clock Enable. INTERRUPT CONTROL UNIT EXTINT[7:0] I External Interrupt request. DMA nXDREQ[1:0] I External DMA request. nXDACK[1:0] O External DMA acknowledge. Table 3. S3C2800 Signal Descriptions Description 01 = 16-bit 10 = 32-bit 1 = Big-endian S3C2800 MICROCONTROLLER 11 = Not used 13 ...

Page 16

... General-purpose input/output ports GPC[3:0] (GPA[7:0], GPB[7:0], GPC[3:0], GPD[7:0] , GPE[7:0], GPF[7:0]) RESET & CLOCK nRESET ST nRESET suspends any operation in progress and places S3C2800 into a known reset state. For a reset, nRESET must be held to low level for at least 4 CPUCLK after the processor power is stabilized. nRESET_OUT O The nRESET_OUT pin is asserted during hardware reset(POR,nRESET), software reset and watchdog reset ...

Page 17

... S3C2800 core logic V VDD P S3C2800 core logic V VSS P S3C2800 Analog logic (PLL loop filter) V AVDD P AVSS P S3C2800 Analog logic (PLL loop filter) V S3C2800 GPIO port V VDD3OP P S3C2800 GPIO port V VSS3OP P PCI-BUS PCI_AD[31:0] I/O PCI Address/Data Bus. Multiplexed address and data bus. PCI_C[3:0]/ I/O PCI C (bus command) or Byte enables ...

Page 18

... S3C2800 MICROCONTROLLER Table 3. S3C2800 Signal Descriptions (Continued) Signal I/O PCI_nREQx[3:2] I PCI_nREQx[3:2] input when internal arbiter is used. Request indicates to the arbiter that this agent desires use of the bus. This is a point-to-point signal. Every master has its own PCI_nREQx, which must be tri-stated, while PCI_nRST is asserted. ...

Page 19

... V Input buffer 3.3 V Output buffer Condition Commercial 3.3V Input buffer 3.3V Output buffer Commercial FCLK = 200MHz 1.95V DD FCLK = 200MHz 3.6V DDP FCLK = 200MHz 1.95V DD FCLK = 200MHz 3.6V DDP FCLK = 6MHz 1.95V DD FCLK = 6MHz 3.6V DDP S3C2800 MICROCONTROLLER Rating Unit 2.4 3.8 3.8 3.8 200 – 150 Min Type Max 1.7 1.8 1.95 3.0 3.3 3.6 3.0 3.3 3.6 3.0 3.3 3 – ...

Page 20

... S3C2800 MICROCONTROLLER DC ELECTRICAL CHARACTERISTICS Table 6. Normal I/O PAD DC Electrical Characteristics (V = 1.8 V -0.1 V/+0. DDP Symbol Parameters V High level input voltage IH LVCMOS interface V Low level input voltage IL LVCMOS interface VT Switching threshold VT+ Schmitt trigger, positive-going threshold VT- Schmitt trigger, negative-going threshold I High level input current IH Input buffer ...

Page 21

... IL I Input Leakage Current I V High level output voltage OH V Low level output voltage OL = 3 OPR Condition Min 0.47V -0.5 0. -500 1500 A OL S3C2800 MICROCONTROLLER Type Max V +0.5 DDP DDP 0.33V DDP -10 10 DDP 0.1V DDP Unit ...

Page 22

... S3C2800 MICROCONTROLLER MECHANICAL DATA PACKAGE DIMENSIONS #208 #1 0.50 NOTE: Dimensions are in millimeters. Figure 3. 208-LQFP-2828 Package Dimensions 20 30.00 ± 0.30 28.00 ± 0.20 208-LQFP-2828 + 0.10 0.20 - 0.05 0.08 MAX DATA SHEET 0~8 + 0.10 0.127 - 0.05 0.10 MAX 0.10 ± 0.05 (1.25) 1.40 ± 0.10 1.60 MAX ...

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