IR2214 IRF [International Rectifier], IR2214 Datasheet

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IR2214

Manufacturer Part Number
IR2214
Description
HALF-BRIDGE GATE DRIVER IC
Manufacturer
IRF [International Rectifier]
Datasheet

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Features
Description
The IR2214SS/IR22141SS) is a gate driver suited to drive
a single half bridge in power switching applications. The
high gate driving capability (2A source, 3A sink) and the
low quiescent current enable bootstrap supply techniques in medium power
systems. The IR2214SS/IR22141SS driver features full short circuit protection by
means of the power transistor desaturation detection. The IR2214SS/IR22141SS
manages all the half-bridge faults by turning off smoothly the desaturated tran-
sistor through the dedicated soft shut down pin, therefore preventing over-volt-
ages and reducing EM emissions. In multi-phase system IR2214SS/IR22141SS
drivers communicate using a dedicated local network (SY_FLT and FAULT/SD
signals) to properly manage phase-to-phase short circuits. The system controller
may force shutdown or read device fault state through the 3.3 V compatible CMOS
I/O pin (FAULT/SD). To improve the signal immunity from DC-bus noise, the
control and power ground use
dedicated pins enabling
low-side emitter current
sensing as well. Under voltage
conditions in floating and low
voltage circuits are managed
independently.
Typical Connection
(Refer to Lead Assignments for
correct pin configuration). This/
These diagram(s) show electrical
connections only. Please refer to
our Application Notes and
DesignTips for proper circuit
board layout.
Floating channel up to +1200V
Soft overcurrent shutdown
Synchronization signal to synchronize shut down
with the other phases
Integrated desaturation detection circuit
Two stage turn on output for di/dt control
Separate pull-up/pull-down output drive pins
Matched delay outputs
Under voltage lockout with hysteresis band
DC BUS
(1200V)
15 V
Control
uP,
ADVANCE DATA
HALF-BRIDGE GATE DRIVER IC
VCC
LIN
HIN
FAULT/SD
FLT_CLR
SY_FLT
VSS
Product Summary
Deadtime matching (max)
Desat blanking time (typ)
Soft shutdown time (typ)
IR2214SS/IR22141SS
DSH,DSL input voltage
SSDH
SSDL
COM
HON
HOP
DSH
LOP
LON
DSL
Deadtime (typ)
VB
VS
threshold (typ)
I O +/- (typ.)
V OFFSET
V OUT
Data Sheet No. PD60213
Package
24-Lead SSOP
1200V max.
2.0 A / 3.0A
10.4V - 20V
330nsec
9.6 sec
75nsec
3 sec
8.0V
DC+
DC-
Motor
1

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IR2214 Summary of contents

Page 1

... The IR2214SS/IR22141SS driver features full short circuit protection by means of the power transistor desaturation detection. The IR2214SS/IR22141SS manages all the half-bridge faults by turning off smoothly the desaturated tran- sistor through the dedicated soft shut down pin, therefore preventing over-volt- ages and reducing EM emissions ...

Page 2

... IR2214/IR22141(SS) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to V SS, dissipation ratings are measured under board mounted and still air conditions. Symbol V High side offset voltage ...

Page 3

... Logic "0" input bias current IN- R FAULT/SD open drain resistance ON,FLT R SY_FLT open drain resistance ON,SY HIN/LIN/ FLTCLR Figure 2: HIN, LIN and FLTCLR diagram www.irf.com IR2214/IR22141(SS) ADVANCE DATA ÷ 1200 V and unless otherwise specified Min Typ Max Units Test Conditions 9.3 10.2 11.4 8 ...

Page 4

... IR2214/IR22141(SS) FAULT/SD SY_FLT V SS Figure 3: FAULT/SD and SY_FLT diagram Pin: DSL, DSH The active bias is present only in IR22141. V respectively for DSL and DSH. Symbol Definition V High desat input threshold voltage DESAT+ V Low desat input threshold voltage DESAT- V Desat input voltage hysteresis ...

Page 5

... Soft Shutdown on resistance (Note 1) ON,SSD I Output low short circuit pulsed current O- Note 1: SSD operation only. on/off internal signal desat internal signal Figure 6: HON, LON, SSDH and SSDL diagram www.irf.com IR2214/IR22141(SS) ADVANCE DATA – –V B HOP or cc LOP 200ns Figure 5: HOP and LOP diagram V ...

Page 6

... IR2214/IR22141(SS) AC Electrical Characteristics 15V and Symbol Definition ton Turn on propagation delay toff Turn off propagation delay tr Turn on rise time (C LOAD tf Turn off fall time (C LOAD ton1 Turn on first stage duration time t DSH to HO soft shutdown propagation delay at HO ...

Page 7

... HIN 50% LIN (HOP=HON) LO (LOP=LON) 10% Figure 7: Switching Time Waveforms www.irf.com IR2214/IR22141(SS) ADVANCE DATA 50 out 90% Ton1 Io1+ Io2+ Figure 8: Output Source Current 3. off f 90% 10% 7 ...

Page 8

... IR2214/IR22141(SS) HIN/LIN DSH/DSL SSD Driver Enable HO/LO Figure 9: Soft Shutdown Timing Waveform 8 ADVANCE DATA DESAT+ t DESAT 3.3V V DESAT www.irf.com ...

Page 9

... DSL SY_FLT 50% t SY_FLT,DESAT1 FAULT/SD FLTCLR 90% SoftShutdown 50% 50% HON 10 DESAT1 on LON LIN 50% HIN HO (HOP=HON) LO (LOP=LON) 50% www.irf.com IR2214/IR22141(SS) ADVANCE DATA 50% 8V 50% 50 SY_FLT,DESAT2 SY_FLT,DESAT3 90% SoftShutdown t DESAT2 90% 50% SoftShutdown 10 DESAT3 t on Figure 10: Desat Timing 50% 50% DTH MDT=DTH-DTL ...

Page 10

... IR2214/IR22141(SS) Lead Assignments 24-Lead SSOP – IR2214SS Lead Definitions Symbol VCC Low side gate driver supply VSS Logic Ground HIN Logic input for high side gate driver outputs (HOP/HON) LIN Logic input for low side gate driver outputs (LOP/LON) Dual function (in/out) active low pin. Refer to figures 17, 18 and 15 output, indicates fault FAULT/SD condition ...

Page 11

... PREVENTION (DT) Deadtime UV_VCC DETECT UV_VCC SSD HOLD FAULT LOGIC SY_FLT managemend FAULT SD FAULT/SD (See figure 14) FLT_CLR VSS www.irf.com IR2214/IR22141(SS) ADVANCE DATA on/off (HS) on/off LOCAL DESAT OUTPUT LEVEL PROTECTION SHUTDOWN SHIFTERS LOGIC on/off (LS) desat SOFT SHUTDOWN UV_VBS DETECT DesatHS LOCAL DESAT PROTECTION ...

Page 12

... IR2214/IR22141(SS) State Diagram FAULT DESAT EVENT Soft ShutDown Stable State FAULT HO=LO=0 (Normal operation) HO/LO=1 (Normal operation) UNDERVOLTAGE V CC SHUTDOWN (SD) UNDERVOLTAGE V BS FREEZE NOTE1: a change of logic value of the signal labeled on lines (system variable) generates a state transition. NOTE2: Exiting from UNDERVOLTAGE V happens ...

Page 13

... X X NOTE1: SY_FLT automatically resets after SSD event is over and FLT_CLR is not required. In order to avoid FLT_CLR to conflict with the SSD procedure, FLT_CLR should not be operated while SY_FLT is active. www.irf.com IR2214/IR22141(SS) ADVANCE DATA IR2214 Logic Table SSDH/SSDL 0 HiZ HiZ HiZ HiZ 0 INPUT/OUTPUT ...

Page 14

... Fault management IR2214 is able to manage both the supply failure (undervoltage lock out on both low and high side circuits) and the desaturation of both power transistors. ...

Page 15

... Different causes can generate a power inverter failure: phase and/or rail supply short-circuit, overload conditions induced by the load, etc… In all these fault conditions a large current increase is produced in the IGBT. The IR2214 fault detection circuit monitors the IGBT emitter to collector voltage ( ...

Page 16

... R (equal DSH/L CC DS- IR2214 dedicated circuit (see the active- bias section for the IR22141). When V creases, the voltage at DSH/L pin increases too. Being internally biased to the local supply, DSH/L voltage is automatically clamped. When DSH/L exceeds the V threshold the com- DESAT+ parator triggers (see figure 13) ...

Page 17

... Fault management in multi-phase systems In a system with two or more gate drivers the IR2214 devices must be connected as in figure 15. SY_FLT. The bi-directional SY_FLT pins communicate each other in the local network. The logic signal is active low. ...

Page 18

... ADVANCE DATA An Active Bias structure is available only for IR22141 version for DSH/L pin. The DSH/L pins present an active pull-up respectively to VB/VCC, and a pull-down respectively to VS/COM. The dedicated biasing circuit reduces the impedance on the DSH/L pin when the voltage exceeds the V threshold (see figure 16) ...

Page 19

... DSL SY_FLT FAULT/SD FLT_CLR HO(HOP/HON) LO(LOP/LON) Figure 17: I/O timing diagram with SY_FLT and FAULT/SD as output www.irf.com IR2214/IR22141(SS) ADVANCE DATA 7. Timing and logic state diagrams O- description The following figures show the input/output logic diagram. Figure 17 shows the SY_FLT and FAULT/SD signals as output, whereas figure 18 shows them as input ...

Page 20

... B. The device outputs goes off by hard shutdown, externally commanded. A through B is the same sequence adopted by another IR2214 device in SSD procedure. C. Externally driven low FAULT/SD (shutdown state) cannot be disabled by forcing FLT_CLR (see FAULT/SD section). D. The FAULT/SD is released and the outputs go back to follow the inputs ...

Page 21

... Sizing tips Bootstrap supply The V voltage provides the supply to the high BS side driver circuitry of the IR2214. This supply sits on top of the V voltage and so it must be S floating. The bootstrap method to generate V can be used with IR2214. The bootstrap supply is formed by a diode and a capacitor connected as in figure 19 ...

Page 22

... IR2214/IR22141(SS) The minimum size of bootstrap capacitor is: Q TOT C BOOT min example follows: a) using a 25A @ 125C IGBT (IRGP30B120KD): = 800 µA (See Static Electrical Charact.); I QBS = 50 µA (See Static Electrical Charact.); nC 160 nC (Datasheet IRGP30B120KD 100 nA (Datasheet IRGP30B120KD); I LK_GE = 100 µ ...

Page 23

... V supply CC www.irf.com IR2214/IR22141(SS) ADVANCE DATA Gate resistances The switching speed of the output transistor can be controlled by properly size the resistors con- trolling the turn-on and turn-off gate current. The ...

Page 24

... DRp Vcc and t from the IR2214 datasheet). and O1+ O2+ on1 ge Table 1 reports the gate resistance size for two commonly used IGBTs (calculation made using typical datasheet values and assuming Vcc=15V). Output voltage slope Turn-on gate resistor R (dV ...

Page 25

... DRn Goff DRn dV C RESoff DRn dV C RESoff dt > 4 Ohm well defined by DRn from IR2214 datasheet). for two popu- Goff /dt = 5V/ns. out std commercial value Tsw 10 Ω 420ns 33 Ω 202ns std commercial value dVout/dt 8.2 Ω 4.5V/ns 82 Ω 5V/ns out dt 25 ...

Page 26

... VS/COM Figure 23: gate drive loop 26 ADVANCE DATA Supply capacitors: IR2214 output stages are able to quickly turn on IGBT with output current. The sup- ply capacitors must be placed as close as pos- sible to the device pins (V ground tied supply, V supply) in order to minimize parasitic inductance/ resistance ...

Page 27

... Figure 24: layout example: top (a), bottom (b) Referred to figure 24: Bootstrap section: R1, C1, D1 High side gate: R2, R3, R4 High side Desat: D2 Low side supply: C2 Low side gate: R5, R6, R7 Low side Desat: D3 www.irf.com IR2214/IR22141(SS) ADVANCE DATA D2 DC Phase and ground plane (c) layer ...

Page 28

... IR2214/IR22141(SS) Case outline IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 28 ADVANCE DATA 24-Lead SSOP Data and specifications subject to change without notice. 12/17/2003 01 6076 01 01 5537 01 MO-150AH www.irf.com ...

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