ax88796blf ASIX Electronics Corporation, ax88796blf Datasheet - Page 25

• Manufacturer Part Number: ax88796blf
• Description: Low-pin-count Non-pci 8/16-bit 10/100m Fast Ethernet Controller
• Manufacturer: ASIX Electronics Corporation

.
For Example.
A Ping packet is configured as a Wakeup frame and AX88196B MAC address is 00 A0 0C C4 7D 69.
Host configure Wakeup frame registers sequences
00 A0 0C C4 7D 69 00 0E C6 12 34 56
00 3C 01 8C 00 00 80
C9 01
67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76
77 61 62 63 64 65 66 67 68 69 CRC (4 bytes)
4.3.2 Magic Packet frame
// Set {Wakeup Frame 1 CRC, Wakeup Frame 0 CRC} = 00 00 2B 42h
// Set {Offset 3 2 1 0} = 00 00 00 06h
// Set {Last Byte 3 2 1 0} = 00 00 00 08h
Write WFLB (Page3, Offset 08H) 08h
Write WFLB (Page3, Offset 08H) 00h
Write WFLB (Page3, Offset 08H) 00h
Write WFLB (Page3, Offset 08H) 00h
// Set {Cascade, Command 3 2 1 0} = 00 00 00 03h
// Set PME and IRQ pin I/O Buffer Type (Please Ref. Datasheet Offset 15 descriptions)
Write BTCR (Offset 15H)
// Host enables wakeup frame detection then enter D1 sleep
// Go to gape3
Write CR(Offset 0h) C2h
// Set Byte Mask 0 = 00 40 08 07
Write WFBM0 (Page3, Offset 01H) 07h
Write WFBM0 (Page3, Offset 01H) 08h
Write WFBM0 (Page3, Offset 01H) 40h
Write WFBM0 (Page3, Offset 01H) 00h
Write WF10CRC (Offset 05H) 42h
Write WF10CRC (Offset 05H) 2Bh
Write WF10CRC (Offset 05H) 00h
Write WF10CRC (Offset 05H) 00h
Write WFOFST (Offset 07H) 06h
Write WFOFST (Offset 07H) 00h
Write WFOFST (Offset 07H) 00h
Write WFOFST (Offset 07H) 00h
Write WFCMD (Offset 09H) 03h
Write WFCMD (Offset 09H) 00h
Write WFCMD (Offset 09H) 00h
Write WFCMD (Offset 09H) 00h
match is required)
Write WUCSR (Page3, Offset 0AH) 02h
Write PMR (Offset 0BH) 01h
AX88796B checks frame for 16 repetitions of the MAC address without any breaks or interruptions. The 16
repetitions may be anywhere in the frame but must be preceded by the synchronization stream
48’hFF_FF_FF_FF_FF_FF pattern. If the MAC address of a node is 00h 11h 22h 33h 44h 55h, then AX88796B
scans for the following data sequence in an Ethernet frame.
Destination Address (6 byte) Source Address (6 byte) . . . . . . . . . FF FF FF FF FF FF
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
. . . . . . . . . CRC (4 byte)
08
00 47 5C 05 00 01 00 61 62 63 64 65 66
01
27 1E C0 09 C9 02 C0 09
08 00 45
00
; page3
; WFBM0 =
; WFBM0 =
; WFBM0 =
; WFBM0 =
; WF10CRC =
; WF10CRC =
; WF10CRC =
; WF10CRC =
; WFOFST =
; WFOFST =
; WFOFST =
; WFOFST =
; {Last Byte 3 2 1 0} =
; {Last Byte 3 2 1 0} =
; {Last Byte 3 2 1 0} =
; {Last Byte 3 2 1 0} =
; WFCMD =
; WFCMD =
; WFCMD =
; WFCMD =
; (Wakeup frame enable)
; (Enter D1 Sleep mode)
25
;
07
08 07
40 08 07
00 40 08
00 00 00
03
00 03
00 00 03
06
00 06
00 00 06
00 00 00
42
2B 42
00 2B 42
00 00 2B
00 00 00h
AX88796BLF / AX88796BLI
00 00 00h
00 00 00h
00 00 00h
00 00h
00 00h
00 00h
00 00h
03h (enabled wake-up frame filter 0, and DA
ASIX ELECTRONICS CORPORATION
00h
07h
00h
00h
06h
08
00 08
00 00 08
00 00 00
00h
42h
00 00 00h
(Offset = 6*2 = 12)
00 00h
00h
08h