ax88790 ASIX Electronics Corporation, ax88790 Datasheet - Page 25

• Manufacturer Part Number: ax88790
• Description: Pcmcia 10/100m Fast Ethernet Controller With Embedded Phy
• Manufacturer: ASIX Electronics Corporation

4.3.10 Inter-frame gap Segment 1(IFGS1) Offset 12H (Read/Write)
4.3.11 Inter-frame gap Segment 2(IFGS2) Offset 13H (Read/Write)
4.3.12 MII/EEPROM Management Register (MEMR) Offset 14H (Read/Write)
4.3.13 Test Register (TR) Offset 15H (Write)
4.3.14 Test Register (TR) Offset 15H (Read)
FIELD
FIELD
FIELD
FIELD
FIELD
6:0
6:0
7:5
2:0
7:4
7
7
7
6
5
4
3
2
1
0
4
3
3
2
1
0
AX88790 L
RST_10B 10BASE-T in Reset: This signal indicates that 10BASE-T logic of internal PHY is in reset.
RST_TX
AUTOD Autonegotiation Done: This signal goes high whenever internal PHY autonegotiation has
EECLK EECLK:
NAME
NAME
NAME
NAME
NAME
RST_B Reset Busy: This signal indicates that internal PHY is in reset.
TF16T Test for Collision
MDIR
EECS
MDO
MDC
EEO
MDI
TPE
IFG
IFG
EEI
IFG
B
-
-
-
-
Reserved
Inter-frame Gap Segment 1. Default value 0cH.
Reserved
Inter-frame Gap Segment 2. Default value 12H.
EEO : (Read only)
EEI
EECS
MDO
MDI: (Read only)
MII STA MDIO signal Direction
let MDIO as output signal.
MDC
Reserved
Test pin Enable
Select Test Pins Output
Reserved
100BASE-TX in Reset: This signal indicates that 100BASE-TX logic of internal PHY is in
reset.
completed. It will go low if autonegotiation has to restart.
EEPROM Clock
EEPROM Data Out value. That reflects Pin-48 EEDO value.
EEPROM Data In. That output to Pin-49 EEDI as EEPROM data input value.
EEPROM Chip Select
MII Data Out
MII Data In. That reflects Pin-66 MDIO value.
MII Read Control Bit, assert this bit let MDIO signal as the input signal. Deassert this bit
MII Clock
3-in-1 PCMCIA Fast Ethernet Controller
25
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
ASIX ELECTRONICS CORPORATION