ax88790 ASIX Electronics Corporation, ax88790 Datasheet - Page 29

• Manufacturer Part Number: ax88790
• Description: Pcmcia 10/100m Fast Ethernet Controller With Embedded Phy
• Manufacturer: ASIX Electronics Corporation

1.15 (T4ABLE)
1.14 (TXFULDUP)
1.13 (TXHAFDUP)
1.12 (ENFULDUP)
1.11 (ENHAFDUP)
1.10:7 (RESERVED)
1.6 (NO_PA_OK)
1.5 (NWAYDONE)
1.4 (REM_FLT)
1.3 (NWAYABLE)
1.2 (LSTAT_OK)
1.1 (JABBER)
1.0 (EXT_ABLE)
4.4.2 MR1 -- Status Register Bit Descriptions
FIELD
AX88790 L
TYPE
R
R
R
R
R
R
R
R
R
R
R
R
R
100Base-T4 Ability. This bit will always be a 0.
0: Not able.
1: Able.
100Base-TX Full-Duplex Ability. This bit will always be a 1.
0: Not able.
1: Able.
100Base-TX Half-Duplex Ability. This bit will always be a 1.
0: Not able.
1: Able.
10Base-T Full-Duplex Ability. This bit will always be a 1.
0: Not able.
1: Able.
10Base-T Half-Duplex Ability. This bit will always be a 1.
0: Not able.
1: Able.
Reserved. All bits will read as a 0.
Suppress Preamble. When this bit is set to a 1, it indicates that the PHY
accepts management frames with the preamble suppressed.
Autonegotiation Complete. When this bit is a 1, it indicates the
autonegotiation process has been completed. The contents of registers MR4,
MR5, MR6, and MR7 are now valid. The default value is a 0. This bit is reset
when autonegotiation is started.
Remote Fault. When this bit is a 1, it indicates a remote fault has been
detected. This bit will remain set until cleared by reading the register. The
default is a 0.
Autonegotiation Ability. When this bit is a 1, it indicates the ability to
perform autonegotiation. The value of this bit is always a 1.
Link Status. When this bit is a 1, it indicates a valid link has been
established. This bit has a latching function: a link failure will cause the bit
to clear and stay cleared until it has been read via the management interface.
Jabber Detect. This bit will be a 1 whenever a jabber condition is detected.
It will remain set until it is read, and the jabber condition no longer exists.
Extended Capability. This bit indicates that the PHY supports the
extended register set (MR2 and beyond). It will always read a 1.
3-in-1 PCMCIA Fast Ethernet Controller
29
DESCRIPTION
ASIX ELECTRONICS CORPORATION