vt82c42 ETC-unknow, vt82c42 Datasheet - Page 10

• Manufacturer Part Number: vt82c42
• Description: Vt82c42 Keyboard Controller
• Manufacturer: ETC-unknow

2. A transmission from Keyboard Controller to external device
* bitp means parity bit, bits means stop bit.
* CLOCK is driven by external device except the leading 250 s & ending 60 s low time.
* DATA is driven by KBC except the low time after the stop bit.
* If the maximum (a), (b), or (c) cannot be met, KBC will terminate the transmission with a timeout error.
3. A transmission from external device to Keyboard Controller
* CLOCK is driven by external device except the ending 60 s low time.
* DATA is driven by external devices.
* If the maximum (a) cannot be met, KBC will terminate the transmission with a timeout error.
4. Upon recieving commands which program the output ports from the host , the controller will put the
corresponding data to the output port within 6 clocks. There is one exception, P
on a typical desktop application. For software compatibility the output of P
CLOCK
DATA
CLOCK
DATA
VIA Technologies, Inc.
15ms max.(a)
250us
90us
3us min.
Figure 6. Clocking from other clock source for VT82C42
bit0
bit0
CLOCK (1-12 MHz)
6us max.
3us min.
Fig 7.Timing from KBC to external device
Fig 8.Timing from external device to KBC
2ms max. (b)
2ms max. (a)
bit1
bit1
30us min.
bit2
bit2
30us min.
.......
.......
.......
.......
bit7
-8-
bit7
bitp
bitp
bits
8us
60us
XTAL1
XTAL2
20
is delayed for 4~8 s.
60us
20
is connected to system reset
wait for response end
20ms max. (c)
VT82C42