UPD16435 NEC [NEC], UPD16435 Datasheet

UPD16435

Manufacturer Part Number

UPD16435

Description

DOT MATRIX LCD CONTROLLER/DRIVER

Manufacturer

NEC [NEC]

Datasheet

1.UPD16435.pdf (36 pages)

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Document No. S10298EJ3V0DS00 (3rd edition)

Date Published April 1997 N

Printed in Japan

DESCRIPTION

composite display by means of control by a microprocessor that has a 4 or 8-bit data bus. A charge pump type

DC/DC converter is also incorporated, enabling 3 or 5 V single power supply drive.

crystal resonator).

FEATURES

• Can interface to 4 or 8-bit CPU.

• Incorporates 119 segment outputs and 73 common outputs.

• 5 7 character font 208 character data configuration character generation ROM and 16 character data configuration

• Incorporates extended display functions such as magnification, lateral scrolling, blink, reverse, etc.

• Operating voltage: 2.7 V to 5.5 V

• On-chip DC/DC converter: Selectable between 4 set-up circuit and 2 step-up circuit

• On-chip temperature correction circuit

• Master/slave operation capability

• On-chip power-on reset circuit

• On-chip oscillation circuit ( PD16435A)

• 232-pin TCP (Tape Carried Package)

ORDERING INFORMATION

Explanation of Part Number

The PD16435 and 16435A are controllers/drivers for a 119 73-dot LCD, and perform LCD full-dot and character

The PD16435 uses an external reference clock. The PD16435A has the on-chip oscillation circuit (external

(Display duty selectable from 1/35, 1/37, 1/71, 1/73)

character generation RAM, allowing composite full-dot and character display

The TCP model is a custom model. For details, consult NEC sales representative.

PD16435N-001-

PD16435N-001-001

PD16435N-001-002

PD16435AN-001-

PD16435AN-001-001

PD16435AN-001-052

PD16435 (A) N-xxx-xxx

Part Number

DOT MATRIX LCD CONTROLLER/DRIVER

TCP code

ROM code

TCP (TAB), Standard ROM code

Standard quad TCP (Conforms to EIAJ), Standard ROM code

Standard dual TCP (Output OLB: 0.25 mm pitch), Standard ROM code

TCP (TAB), Standard ROM code

Standard quad TCP (Conforms to EIAJ), Standard ROM code

Standard dual TCP (Output OLB: 0.25 mm pitch), Standard ROM code

DATA SHEET

PD16435, 16435A

MOS INTEGRATED CIRCUIT

Package

1995

Related parts for UPD16435

UPD16435 Summary of contents

Page 1

DOT MATRIX LCD CONTROLLER/DRIVER DESCRIPTION The PD16435 and 16435A are controllers/drivers for a 119 73-dot LCD, and perform LCD full-dot and character composite display by means of control by a microprocessor that has 8-bit data bus. A ...

Page 2

BLOCK DIAGRAM 73-Bit Shift Register Address Counter Instruction Decoder Instruction Register Parallel I/F 2 Common Driver Scroll RAM 13 73 Bits Display RAM 119 73 Bits Busy Flag Data Register 2/ 4 Step-Up Circuit PD16435, 16435A Segment Driver 119-Bit Latch ...

Page 3

PIN CONFIGURATION (CHIP) 258 Dummy1 1 Dummy2 COM38 COM39 COM73 Dummy3 Dummy4 SEG1 SEG30 Dummy5 79 80 Dummy13 PD16435, 16435A 215 214 Dummy22 Dummy21 COM1 COM2 COM37 Dummy20 Dummy17 SEG119 135 136 SEG85 Dummy16 3 ...

Page 4

PIN DESCRIPTIONS Pin Name Pin No. Input/Output CS 255 Input RS 254 Input RD 253 Input (Schmitt) WR 252 Input (Schmitt) WS 251 Input 250 Input/output 0 7 243 BUSY 240 Output RESET 242 Input SCR ...

Page 5

Pin Name Pin No. Input/Output V1 221 Output 220 Input 217 V (–) 224 IN Input V (+) 223 GND1 232, 256 ––– GND2 257, 222 ––– DD 3/5 236 ...

Page 6

REGISTER FUNCTIONS (1) Address Register Sets the address of each register, and also sets display control, standby mode, and scaler resetting. MSB Note Standby mode = DC/DC converter stopped OSC input invalid ...

Page 7

Full-Dot X Address Register (Register Address = 0000B) Performs full-dot display, display screen X (segment) direction address setting. As scrolling is not possible with a full- dot display, addresses are not allocated to the scroll RAM area. MSB LSB ...

Page 8

Full-Dot X Address and Y Address Allocation X Address 00H(1) 01H(2) 00H(1) 01H(2) 48H(73 Bits (5) Character X Address Register (Register Address = 0011B) Performs character display display, screen X (segment) ...

Page 9

Character Data Register (Register Address = 0101B) The character indicated in the character code table is displayed at the position indicated by the character X and Y address registers. MSB LSB ...

Page 10

CGRAM Address Register (Register Address = 0110B) Performs address setting when display data is written to CGRAM. Bits the CGRAM address indicate the character code, and bits indicate the character line. MSB ...

Page 11

Extension Register (Register Address = 1000B) Performs magnification, reverse, cursor, and time mark setting. MSB LSB After powering Don’t Care In case of magnification setting 00: Standard 01: 2 ...

Page 12

Display and RAM Allocation in Case of Magnification Setting (1) Example of 2 horizontal magnification (line 07H specified) Display 00H(1) 01H(2) 00H(1) 01H(2) (X=00H) 07H(8) RAM 01H(2) 00H(1) 00H(1) 01H(2) 07H(8) 00H 01H Note Lines 0AH to 15H for which ...

Page 13

Example of 2 vertical magnification (line 00H specified) Display 01H(2) 00H(1) 00H(1) 01H(2) 06H(7) RAM 00H(1) 01H(2) 00H(1) 01H(2) 06H(7) 07H(8) Note If 2 vertical magnification is specified for line 07H, the lower half will be outside the display ...

Page 14

Example of 4 magnification (line 00H specified) Display 00H(1) 00H(1) 01H(2) 06H(7) 00H 01H RAM 01H(2) 00H(1) 00H(1) 01H(2) 06H(7) 07H(8) 00H 01H Note Lines 0AH to 15H for which 4 magnification is specified can be used as scroll ...

Page 15

Extension X Address Register (Register Address = 1001B) Performs extension display, display screen X (segment) direction address setting. X addresses include the scroll RAM area. This register must be executed before the extension Y address register. MSB LSB b4 ...

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