em658160ts-8 Etron Technology Inc., em658160ts-8 Datasheet

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... EM658160TS-5 200MHz EM658160TS-6 166MHz EM658160TS-7 143MHz EM658160TS-8 125MHz Overview The EM658160 SDRAM is a high-speed CMOS double data rate synchronous DRAM containing 64 Mbits internally configured as a quad DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). ...

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Et ronT ech Block Diagram DLL CK CLOCK /CK BUFFER CKE /CS COMMAND /RAS /CAS DECODER /WE COLUMN COUNTER A10/AP ADDRESS A0 BUFFER A11 BS0 BS1 REFRESH COUNTER DATA LDQS, STROBE UDQS BUFFER DQ0 D DQ15 Etron Confidential 4Mx16 DDR ...

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Et ronT ech Pin Descriptions Symbol Type CK, /CK Input Differential Clock: CK, /CK are driven by the system clock. All SDRAM input signals are sampled on the positive edge of CK. Both CK and /CK increment the internal burst ...

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Et ronT ech Supply Power Supply: +3.3V ±0. Supply Ground SS Supply DQ Power: +2.5V ±0.2V. Provide isolated power to DQs for improved noise immunity. V DDQ V Supply DQ Ground: Provide isolated ground to DQs for ...

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Et ronT ech Operation Mode Fully synchronous operations are performed to latch the commands at the positive edges of CK. Table 2 shows the truth table for the operation commands. Command BankActivate BankPrecharge PrechargeAll Write Write and AutoPrecharge Read Read ...

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Et ronT ech Mode Register Set (MRS) The mode register is divided into various fields depending on functionality. • Burst Length Field (A2~A0) This field specifies the data length of column access using the A2~A0 pins and selects the Burst ...

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Et ronT ech • CAS Latency Field (A6~A4) This field specifies the number of clock cycles from the assertion of the Read command to the first read data. The minimum whole value of CAS Latency depends on the frequency of ...

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Et ronT ech Absolute Maximum Rating Symbol Input, Output Voltage IN OUT Power Supply Voltage DD DDQ T Operating Temperature OPR T Storage Temperature STG T Soldering Temperature (10s) SOLDER P Power Dissipation D ...

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Et ronT ech = 3.3V 1MHz °C) Capacitance (V DD Symbol Parameter C Input Capacitance (except for CK pin) IN Input Capacitance (CK pin) C DQ, DQS, DM Capacitance I/O Note: These parameters are periodically ...

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Et ronT ech Electrical Characteristics and Recommended A.C. Operating Conditions = 3.3 ± 0 0~70 ° Symbol Parameter t Row cycle time RC t Refresh row cycle time RFC t Row active time RAS t ...

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Et ronT ech Note: 1. Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. 2. All voltages are referenced These parameters depend on the cycle rate and these values are ...

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Et ronT ech Timing Waveforms Figure 1. AC Parameters for Read Timing / CMD Read ADDR /CS DQS DQ Etron Confidential 4Mx16 DDR SDRAM (Burst Length=4, CAS ...

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Et ronT ech Figure 2. AC Parameters for Write Timing CK /CK CMD ADDR /CS DQ DQS Etron Confidential 4Mx16 DDR SDRAM (Burst Length=4) Write WPRES DSH t DSL t ...

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Et ronT ech Figure 3. Read Command to Output Data Latency CK /CK CMD Read CL=2 DQ DQS CL=2.5 DQ DQS CL=3 DQ DQS Etron Confidential 4Mx16 DDR SDRAM (Burst Length=2) DA1 DA0 Postamble Preamble DA0 DA1 Postamble Preamble DA1 ...

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Et ronT ech Figure 4. Read Followed by Write CK /CK t RRD t RCDR Activate Read CMD ACT ADDR Row/Bank0 Col/Bank0 Rol/Bank1 /CS DQ DQS Etron Confidential 4Mx16 DDR SDRAM (Burst Lenth=4, CAS Latency=3) Write Col/Bank0 ...

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Et ronT ech Figure 5. Write followed by Read CK /CK Write CMD Col ADDR / DQS Etron Confidential 4Mx16 DDR SDRAM (Burst Lenth=4, CAS Latency=3) t WTR Read Col ...

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Et ronT ech Figure 6. Precharge Termination of a Burst Read CK /CK CMD Read ADDR /CS DQ DQS Etron Confidential 4Mx16 DDR SDRAM (Burst Length=4, CAS Latency=3) Precharge Bank Col t RP Preamble 17 EM658160 ACT Bank D1 D0 ...

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Et ronT ech Figure 7. Precharge Termination of a Burst Write CK /CK Activate Write CMD ADDR Row/Bank Col/Bank /CS t RCD DQM DQ DQS Etron Confidential 4Mx16 DDR SDRAM (Burst Length= Precharge Activate Row/Bank Row/Bank t t ...

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Et ronT ech Figure 8. Auto Precharge after Read Burst CK / BL=2 Auto Precharge CMD ReadA DQ Auto Precharge BL=4 CMD ReadA DQ BL=8 CMD ReadA DQ Etron Confidential 4Mx16 DDR SDRAM (CAS Latency=3) ACT D0 D1 ...

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Et ronT ech Figure 9. Auto Precharge after Write Burst CK /CK BL=2 WriteA Auto Precharge CMD Preamble DQS Postamble WriteA BL=4 CMD Preamble DQS Postamble BL=8 WriteA CMD ...

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Et ronT ech Figure 10. Read Terminated By Burst Stop CK /CK Read CMD Col ADDR /CS CL=3 DQ DQS Etron Confidential 4Mx16 DDR SDRAM (Burst Length=8) BST EM658160 Rev. 1.1 Jan. 2002 ...

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Et ronT ech Figure 11. Read Terminated by Read CK /CK t CCD CMD Read Read ADDR Col A Col B /CS DQ DQS Etron Confidential 4Mx16 DDR SDRAM (Burst Length=4, CAS Latency=3) DA1 DA0 DB0 DB1 22 Rev. 1.1 ...

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Et ronT ech Figure 12. Mode Register Set Command CK /CK t CMD Precharge ADDR /CS Etron Confidential 4Mx16 DDR SDRAM 1 clk RP MRS ACT Row MRS Data 23 EM658160 Rev. 1.1 Jan. 2002 ...

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Et ronT ech Figure 13. Active / Precharge Power Down Mode CK / CKE CMD Activate / Precharge Note 1,2 Note: 1. All banks should be in idle state prior to entering precharge power down mode. 2. One ...

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Et ronT ech Figure 14. Self Refresh Entry and Exit Cycle CK /CK Self Refresh Enter Auto CMD Refresh CKE t IS Self Refresh Exit t is required before any command can be applied, RC and 200 cycles of clk ...

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Et ronT ech 66 Pin TSOP II Package Outline Drawing Information Units: mm 22.22 0. 0.65 TYP 0.71 TYP Etron Confidential 4Mx16 DDR SDRAM 34 33 0.30 0.08 26 EM658160 + 0.085 0.125 - 0.005 ...