UPD4701AGT NEC [NEC], UPD4701AGT Datasheet - Page 10

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UPD4701AGT

Manufacturer Part Number
UPD4701AGT
Description
MOS INTEGRATED CIRCUIT
Manufacturer
NEC [NEC]
Datasheet
AC CHARACTERISTICS (T
AC TEST INPUT WAVEFORM
AC test : The input is driven by 2.6 V for logic “1”, and 0.45 V for logic “0”.
10
RESET
X
Y
D
W, Y
R, L
X/Y
U/L
A
A
CS
SF
CF
0.45 V
M
0 to 7
, X
, Y
2.6 V
B
B
Timing measurement is performed at 1.5 V for both logic “1” and logic “0”.
Input cycle
High-level pulse width
Low-level pulse width
Signal phase difference time
High-level pulse width
Low-level pulse width
Setting delay time
Reset delay time
Pulse width
Count enable time
Count clear time
Flag setting time
Flag reset time
Count setting time
CF enable time
CF disable time
Pulse width
Address setup time
Address hold time
Output delay time
Output delay time
Floating time
PARAMETER
a
= –40 to +85 C, V
1.5 V
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
PWSWH
t
t
PWABH
PWSWL
t
t
PWABL
t
t
SCTEN
DABCF
DCSCF
SCSCF
HABCS
t
HCSAB
t
DCTCL
t
PWRS
t
PWCS
t
CYAB
DSFH
SACS
DCSD
FCSD
DSFL
SAB
SCT
DAD
DD
= +5 V
Test Point
MIN.
900
900
350
100
140
140
200
30
30
2
0
0
0
0
RATING
10 %)
MAX.
100
120
100
150
100
50
50
50
1.5 V
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
f
Switch OFF
Switch ON
Switch ON
Switch OFF
From RESET
From RESET
From X
From CS
From CF
From CF
From X
To CS
From CS
From CS
From X/Y, U/L
From CS
in
= 500 kHz
TEST CONDITIONS
A
A
,
,
B
B
, Y
, Y
X
X
A
A
,
,
,
,
Y
Y
B
B
PD4701A

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