vt8371 ETC-unknow, vt8371 Datasheet
vt8371
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vt8371 Summary of contents
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... Fixed minor typo in pinout table (pin lists and descriptions were correct) Added Device 0 Rx55[1], moved Device 0 registers RxB4-B6 to B3-B5 Removed “Socket-462” from description (chip is optimized for Slot-A) Updated VIA Logo to “Delivering Value” format Fixed typos in DRAM controller feature bullets and Device 0 RxB2[0] -i- VT8371 Initials ...
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... Device 1 Header Registers - PCI-to-PCI Bridge ................................................................................................................ 40 Device 1 Configuration Registers - PCI-to-PCI Bridge..................................................................................................... 42 AGP Bus Control .................................................................................................................................................................................. 42 ELECTRICAL SPECIFICATIONS............................................................................................................................................... BSOLUTE AXIMUM ATINGS DC C ................................................................................................................................................................ 45 HARACTERISTICS ...................................................................................................................................................... 45 IMING PECIFICATIONS MECHANICAL SPECIFICATIONS ............................................................................................................................................. 46 Preliminary Revision 1.02, January 7, 2000 T C ABLE OF ONTENTS ................................................................................................................................................. 45 -ii- VT8371 Table of Contents ...
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... FIGURE 1. KX133 SYSTEM BLOCK DIAGRAM USING THE VT82C686A SOUTH BRIDGE .......................................... 4 FIGURE 2. VT8371 BALL DIAGRAM (TOP VIEW) .................................................................................................................. 6 FIGURE 3. VT8371 PIN LIST (NUMERICAL ORDER) ............................................................................................................. 7 FIGURE 4. VT8371 PIN LIST (ALPHABETICAL ORDER) ...................................................................................................... 8 FIGURE 5. CPU / SDRAM / AGP / PCI CLOCK CONNECTIONS ......................................................................................... 15 FIGURE 6. GRAPHICS APERTURE ADDRESS TRANSLATION ......................................................................................... 34 FIGURE 7. MECHANICAL SPECIFICATIONS - 516-PIN BALL GRID ARRAY PACKAGE ........................................... 46 Preliminary Revision 1 ...
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... TABLE 1. VT8371 PIN DESCRIPTIONS ...................................................................................................................................... 9 TABLE 2. VT8371 REGISTERS ................................................................................................................................................... 17 TABLE 3. SYSTEM MEMORY MAP.......................................................................................................................................... 24 TABLE 4. MEMORY ADDRESS MAPPING TABLE ............................................................................................................... 24 TABLE 5. VGA/MDA MEMORY/IO REDIRECTION.............................................................................................................. 42 TABLE 6. AC TIMING MIN / MAX CONDITIONS.................................................................................................................. 45 Preliminary Revision 1.02, January 7, 2000 L T IST OF ABLES -iv- VT8371 List of Tables ...
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... High Performance and High Integration Athlon AGP 4x / PC133 Chipset with Advanced System Power Management KX133 Chipset: VT8371 system controller and VT82C686A PCI to ISA bridge Single chip Athlon system controller with 64-bit Slot-A / Athlon CPU, 64-bit system memory, 32-bit PCI and 32-bit ...
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... Transaction timer for fair arbitration between PCI masters (granularity of two PCI clocks) Symmetric arbitration between Host/PCI bus for optimized system performance Complete steerable PCI interrupts PCI-2.2 compliant, 32 bit 3.3V PCI interface with 5V tolerant inputs Preliminary Revision 1.02, January 7, 2000 CPU Mode 100 MHz DDR 3x synchronous -2- VT8371 Features ...
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... VTT suspend power plane preserves memory data Suspend-to-DRAM and Self-Refresh operation SDRAM self-refresh power down 8 bytes of BIOS scratch registers Low-leakage I/O pads Built-in NAND-tree pin scan test capability 3.3V, 0.35um, high speed / low power CMOS process mm, 516 pin BGA Package Preliminary Revision 1.02, January 7, 2000 -3- VT8371 Features ...
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... Figure 1. KX133 System Block Diagram Using the VT82C686A South Bridge The KX133 chip set consists of the VT8371 system controller (516 pin BGA) and the VT82C686A PCI to ISA bridge (352 pin BGA). The system controller provides superior performance between the CPU, DRAM, AGP bus, and PCI bus with pipelined, burst, and concurrent operation ...
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... Coupled with the VT82C686A south bridge chip, a complete power conscious PC main board can be implemented with no external TTLs. The KX133 chipset is ideal for high performance, high quality, high energy efficient and high integration desktop AGP / PCI / ISA computer systems. Preliminary Revision 1.02, January 7, 2000 -5- VT8371 The Overview ...