UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 59

• Manufacturer Part Number: UPD75238GJ
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC [NEC]

(3) Clock output mode register (CLOM)
Address
FD0H
The CLOM is a 4-bit register to control clock output.
The CLOM is set with a 4-bit memory manipulation instruction. No read operation is allowed on this
register.
A RESET input clears the CLOM to 0, disabling clock output.
Example
Caution
CLOM3
3
Be sure to write a 0 in bit 2 of the CLOM.
CPU clock
SEL
MOV A, #1000B
MOV CLOM, A
0
2
MB15
CLOM1
Fig. 4-21 Format of the Clock Output Mode Register
1
is output on the PCL/P22 pin.
CLOM0
; Or CLR1 MBE
0
Clock output enable/disable bit
Clock output frequency selection bit
(Frequency when f
(Frequency when f
Note
0
0
1
1
0
0
1
1
0
1
Symbol
CLOM
Output disable
Output enable
1
0
1
0
1
0
0
1
is the CPU clock supply selected by PCC.
Output f
Output f
Output f
Output f
Output f
Output f
Output
Output
X
X
X
X
X
X
X
X
/2
/2
/2
/2
/2
/2
= 6.0 MHz)
Note
= 4.19 MHz)
Note
4
6
3
4
6
3
(375 kHz)
(93.7 kHz)
(524 kHz)
(262 kHz)
(65.5 kHz)
(750 kHz)
(1.50 MHz, 750 kHz, 375 kHz, 93.7 kHz)
(1.05 MHz, 524 kHz, 262 kHz, 65.5 kHz)
PD75238
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