UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 10

no-image

UPD75238GJ

Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
1.2 NON-PORT PINS (2/2)
Also
Pin name
I/O
used as
TI0
I
External event pulse input for timer/event counter #0 and
P13
event counter #1.
O
Timer/event counter output
PTO0
P20
PCL
O
Clock output
P22
BUZ
O
P23
Fixed frequency output (for buzzer or system clock trimming)
SCK0
I/O
P01
Serial clock I/O
I/O
Serial data output or serial bus I/O
SO0/SB0
P02
SI0/SB1
I/O
P03
Serial data input or serial bus I/O
INT4
I
P00
Edge detection vectored interrupt input (Either a rising or
falling edge is detected.)
Edge detection vectored interrupt input
INT0
I
P10
(The edge to be detected is selectable.)
INT1
P11
Edge detection testable input
INT2
I
P12
(An rising edge is detected.)
SCK1
I/O
Serial clock I/O
P81
SO1
O
P82
Serial data output
SI1
I
P83
Serial data input
Analog input to A/D converter
AN0-AN3
I
AN4-AN7
P90-P93
AV
Power supply for A/D converter
DD
AV
I
A/D converter reference voltage input
REF
A/D converter reference GND
AV
SS
Connection to a crystal/ceramic resonator for main system
X1, X2
I
clock generation. When external clock is used, it is input to
X1, and its inverted signal is input to X2.
XT1
Connection to a crystal resonator for subsystem clock
I
generation. When external clock is used, it is input to XT1,
XT2
and XT2 is left open.
I
RESET
System reset input
PPO
O
P80
Timer/pulse generator pulse output
V
(3 pins)
Positive power supply
DD
V
(2 pins)
GND potential
SS
V
Pull-down resistor connection for the FIP controller/driver,
LOAD
or power supply
Note The circuits enclosed in circles have a Schmitt-triggered input.
10
Function
When reset
Input
Input
Input
Input
Input
Input
Synchronous
Asynchronous
Asynchronous
Input
Input
Input
Input
PD75238
Note
I/O
circuit
type
B
- C
E - B
E - B
E - B
F
- A
- B
F
M - C
B
B
- C
B
- C
F
E
B
Y
Y - A
Z
B

Related parts for UPD75238GJ