UPD75238GJ

Manufacturer Part NumberUPD75238GJ
Description4 BIT SINGLE-CHIP MICROCOMPUTER
ManufacturerNEC [NEC]
UPD75238GJ datasheet
 
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Page 123/190

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(4) Display mode register (DSPM)
The display mode register (DSPM) is a 4-bit register for enable/disable setting for the display operation
and for specifying the number of display segments. Fig. 4-70 shows the format of the register.
The display mode register is set with a 4-bit memory manipulation instruction.
Before a standby mode (STOP mode or HALT mode) can be set or the subsystem clock (f
for operation, display must be disabled by setting DSPM.3 to 0.
A RESET input clears all bits to 0.
Fig. 4-70 Display Mode Register Format
Address
3
2
1
0
F88H
DSPM3
DSPM2
DSPM1
DSPM0
Bit for specifying the number of display segments
DSPM2
DSPM1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Remark Segments in parentheses are added when pins S16 to S23 are specified as dynamic mode
in STATB.
Display operation enable/disable bit
0
DSPM3
1
(5) Digit select register (DIGS)
The digit select register (DIGS) is a 4-bit register that specifies the number of display digits. Fig. 4-71 shows
the format of the register.
DIGS is set with a 4-bit memory manipulation instruction. This register enables the number of display
digits to be selected from 9 to 16 digits. No other values can be selected.
A RESET input initializes the register to 1000B so that 9-digit display is selected.
Fig. 4-71 Digit Select Register Format
Address
3
2
1
0
F8AH
DIGS3
DIGS2
DIGS1
DIGS0
Symbol
DSPM
DSPM0
Number of display segments
0
9 segments (+ 8 segments)
1
10 segments (+ 8 segments)
0
11 segments (+ 8 segments)
1
12 segments (+ 8 segments)
0
13 segments (+ 8 segments)
1
14 segments (+ 8 segments)
0
15 segments (+ 8 segments)
1
16 segments (+ 8 segments)
Display disabled
Display enabled
Symbol
DIGS
Caution Do not set a value from 0 to 7 for N.
DIGS0-3 set value
N (= 8 to 15)
PD75238
) can be used
XT
Number of display digits
N + 1
123