UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 124

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UPD75238GJ

Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
(6) Dimmer select register (DIMS)
124
The dimmer select register (DIMS) is a 4-bit register for specifying a digit signal cut width to prevent display
light leakage and to use the dimmer function (for intensity control). In addition, the register is used to
select a display cycle (T
Fig. 4-72 shows the format of DIMS.
DIMS is set with a 4-bit memory manipulation instruction.
A display cycle of 341 s at 6.0 MHz
However, as the number of display digits increases, the display cycle becomes closer to the frequency
of commercial power, causing the display to fricker. In this case, a display cycle of 171 s at 6.0 MHz
2
DIMS.1, DIMS.2, and DIMS.3.
A RESET input clears all bits to 0.
Notes 1. 489 s at 4.19 MHz
Address
F89H
Notes 1. 244 s at 4.19 MHz
should be selected. If light leakage occurs in this case, adjust cutting width of the digit single by setting
2. 244 s at 4.19 MHz
2. 489 s at 4.19 MHz
DIMS3
DIMS2
DSP
Display cycle specification bit
Digit signal cut width specification bit
DIMS1
DIMS0
DIMS3
).
Fig. 4-72 Dimmer Select Register Format
0
0
0
0
1
1
1
1
Note 1
DIMS0
DIMS2
0
1
0
0
1
1
0
0
1
1
is usually selected by setting 1 in DIMS.0 for reduced light leakage.
DIMS1
A display cycle is 1024 . (One cycle = 171 s/6.0 MHz)
A display cycle is 2048 . (One cycle = 341 s/6.0 MHz)
Symbol
DIMS
0
1
0
1
0
1
0
1
Digit signal cut width
1/16
2/16
4/16
6/16
8/16
10/16
12/16
14/16
f
f
X
X
Note 1
Note 2
PD75238
Note

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