UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 39
UPD75238GJ
Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
1.UPD75238GJ.pdf
(190 pages)
- Current page: 39 of 190
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3.8 BANK SELECT REGISTER (BS)
(MBS), which specify a register bank and memory bank to be used, respectively.
BS/POP BS instruction.
(1) Memory bank select register (MBS)
(2) Register bank select register (RBS)
The bank select register consists of a register bank select register (RBS) and memory bank select register
The RBS and MBS are set using the SEL RBn instruction and SEL MBn instruction, respectively.
The contents of BS can be saved to or restored from a stack area eight bits at a time by using the PUSH
The memory bank select register is a 4-bit register used to store the high-order four bits of a 12-bit data
memory address. The contents of this register specify a memory bank to be accessed. Memory banks
0, 1, 2, 3, and 15 can be specified.
The MBS is set with the SEL MBn instruction (n = 0, 1, 2, 3, 15)
Fig. 2-1 shows the range of addressing using MBE and MBS settings.
A RESET input initializes the MBS to 0.
The register bank select register specifies a register bank to be used as general registers; a register bank
can be selected from register banks 0 to 3.
The RBS is set with the SEL RBn instruction (n = 0 to 3).
A RESET input initializes the RBS to 0.
Remark
: Don’t care
Address
F82H
Table 3-5 Register Bank to Be Selected with the RBE and RBS
RBE
0
1
MBS3 MBS2 MBS1 MBS0
3
0
0
Fig. 3-12 Bank Select Register Format
2
0
0
RBS
MBS
Always 0
1
0
0
1
1
0
0
1
0
1
Bank 0 is always selected.
Bank 0 is selected.
Bank 1 is selected.
Bank 2 is selected.
Bank 3 is selected.
0
0
Register bank
RBS
RBS1
RBS0
Symbol
BS
PD75238
39
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