UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 50

• Manufacturer Part Number: UPD75238GJ
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC [NEC]

50
(2) Functions of the clock generator
The clock generator generates the clock signals listed below, and controls the standby mode and other
CPU operation modes.
• Main system clock: f
• Subsystem clock: f
• CPU clock:
• Clocks for peripheral hardware
The operation of the clock generator is determined by the processor clock control register (PCC) and
system clock control register (SCC). The clock generator functions and operates as described below.
Notes 1. 15.3 s at 4.19 MHz
(a) A RESET input selects the lowest-speed mode (10.7 s at 6.0 MHz)
(b) When the main system clock is selected, the PCC can be set to select one of four CPU clocks (0.67
(c) When the main system clock is selected, the two standby modes, STOP mode and HALT mode, are
(d) The SCC can be set to select the subsystem clock for very low-speed, low-current operation (122 s
(e) When the subsystem clock is selected, main system clock generation can be stopped with the SCC.
(f) Clocks for peripheral hardware are produced by dividing the main system clock signal. Only to the
(g) When the subsystem clock is selected, the watch timer can operate normally, but other hardware
(PCC = 0, SCC = 0)
available.
at 32.768 kHz).
In addition, the HALT mode can be used, but the STOP mode cannot be used. (Subsystem clock
generation cannot be stopped.)
watch timer, the subsystem clock can be directly supplied to continue the clock function.
cannot be used because they operate with the main system clock.
s, 1.33 s, 2.67 s, and 10.7 s at 6.0 MHz)
2. 0.95 s, 1.91 s, 3.82 s, 15.3 s at 4.19 MHz
XT
X
Note 2
.
Note 1
for the main system clock.
PD75238