UPD75238GJ

Manufacturer Part NumberUPD75238GJ
Description4 BIT SINGLE-CHIP MICROCOMPUTER
ManufacturerNEC [NEC]
UPD75238GJ datasheet
 
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Page 59/190

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(3) Clock output mode register (CLOM)
The CLOM is a 4-bit register to control clock output.
The CLOM is set with a 4-bit memory manipulation instruction. No read operation is allowed on this
register.
Example
CPU clock
is output on the PCL/P22 pin.
SEL
MB15
; Or CLR1 MBE
MOV A, #1000B
MOV CLOM, A
A RESET input clears the CLOM to 0, disabling clock output.
Fig. 4-21 Format of the Clock Output Mode Register
Address
3
2
1
0
CLOM3
0
CLOM1
CLOM0
FD0H
Caution
Be sure to write a 0 in bit 2 of the CLOM.
Symbol
CLOM
Clock output frequency selection bit
(Frequency when f
= 6.0 MHz)
X
Note
0
0
Output
(1.50 MHz, 750 kHz, 375 kHz, 93.7 kHz)
3
1
0
Output f
/2
(750 kHz)
X
4
1
0
Output f
/2
(375 kHz)
X
6
1
Output f
/2
(93.7 kHz)
1
X
(Frequency when f
= 4.19 MHz)
X
Note
0
0
Output
(1.05 MHz, 524 kHz, 262 kHz, 65.5 kHz)
3
0
1
Output f
/2
(524 kHz)
X
4
0
Output f
/2
(262 kHz)
1
X
6
1
1
Output f
/2
(65.5 kHz)
X
Note
is the CPU clock supply selected by PCC.
Clock output enable/disable bit
0
Output disable
1
Output enable
PD75238
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