UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 69
UPD75238GJ
Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
1.UPD75238GJ.pdf
(190 pages)
- Current page: 69 of 190
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4.6 CLOCK TIMER
(1) Clock timer
(2) Clock timer functions
From the
clock
generator
The PD75238 contains one channel for a clock timer. Fig. 4-29 shows the configuration of the timer.
(a) The clock timer sets the test flag (IRQW) every 0.5 seconds.
(b) Either the main system clock (4.19 MHz) or subsystem clock (32.768 kHz) can produce 0.5-second
(c) The fast-forward mode produces an interval 128 times faster (3.91 ms), which is useful for program
(d) A fixed frequency (2.048, 4.096, or 32.768 kHz) can be output to the P23/BUZ pin, so that it can be used
(e) The frequency divider can be cleared, so the clock can start from zero seconds.
Remark
Caution
The standby mode can be released with IRQW.
intervals.
debugging and testing.
for sounding the buzzer and system clock frequency trimming.
(32.768 kHz)
f
(32.768 kHz)
128
XT
f
X
The values in parentheses are for f
When the main system clock operates at 6.0 MHz, a time interval of 0.5 s cannot be produced.
Before producing this time interval, the main system clock must be changed to the subsystem
clock.
WM
WM7
0
Selector
WM5 WM4
Fig. 4-29 Block Diagram of the Clock Timer
f
(32.768 kHz)
W
Selector
8
0
f
8
W
WM2 WM1 WM0
16
X
f
W
= 4.194304 MHz and f
Frequency divider
Internal bus
(4.096 kHz)
f
2
Clear
W
7
(256 Hz: 3.91 ms)
P23 output
latch
XT
= 32.768 kHz
2
2 Hz
0.5 sec
PORT2.3
f
W
14
Selector
Port 2 input/
output mode
Output buffer
PD75238
Bit 2 of PMGB
INTW
IRQW
set signal
P23/BUZ
69
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