UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 70
UPD75238GJ
Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
1.UPD75238GJ.pdf
(190 pages)
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70
(3) Watch mode register (WM)
The watch mode register (WM) is an 8-bit register that controls the clock timer, and that is set with an
8-bit memory manipulation instruction. Fig. 4-30 shows the format.
An 8-bit memory manipulation instruction is used to set the watch mode register. A RESET input clears
all bits to 0.
Address
F98H
WM7
7
6
0
WM5
Fig. 4-30 Format of the Clock Mode Register
Count clock (f
Operation mode selection bit
Clock operation enable/disable bit
BUZ output frequency selection bit
Note Not supported by the IE-75000-R.
BUZ output enable/disable bit
5
WM5
WM0
WM1
WM2
WM7
1
0
0
1
WM4
4
WM4
0
1
0
1
0
1
0
1
0
1
0
1
W
) selection bit
3
0
Selects divided system clock output:
Selects subsystem clock: f
Normal clock mode (
Advanced clock mode (
Disables clock operation (clears the frequency dividing circuit)
Enables clock operation
BUZ output frequency
f
f
Not to be set
f
Disables BUZ output
Enables BUZ output
W
W
W
/2
/2
(32.768 kHz)
4
3
WM2
(2.048 kHz)
(4.096 kHz)
2
WM1
1
Note
Note
WM0
2
f
0
W
14
f
2
W
: sets IRQW at 0.5 s)
7
XT
: sets IRQW at 3.91 ms)
Symbol
WM
128
f
X
PD75238
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