PLL502-26 PhaseLink (PLL), PLL502-26 Datasheet
PLL502-26
Related parts for PLL502-26
PLL502-26 Summary of contents
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... VDD_VCXO 3 XIN 4 XOUT 5 VCON 6 GND_VCXO 7 GND_PLL 8 Note: * Pins reserved for future DAC integration OUTPUT RANGE OUTPUT FREQUENCY RANGE VCXO Audio 8.192MHz – 12.288MHz OUT_27MHz OUT_Audio PLL502-26 N/C* 16 GND_27MHz 15 OUT_27MHz 14 VDD_27MHz 13 12 VDD_Audio 11 OUT_Audio 10 GND_Audio 9 REF_Audio OUTPUT TYPE 27MHz CMOS CMOS Rev 09/26/03 Page 1 ...
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... VDD. +3.3V VDD power supply pin for 27MHz output clock. This pin should be P decoupled separately from other VDD. O 27MHz VCXO output clock. P GND connection for 27MHz output buffer circuitry. SYMBOL PLL502-26 Preliminary Description MIN. MAX 0 0.5 V 0.5 I ...
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... XIN XTAL C /C < 250 VIN 3.3V 0V VIN 3.3V, -3dB CONDITIONS with capacitive decoupling between VDD and GND. 27MHz @100Hz offset 27MHz @1kHz offset 27MHz @10kHz offset 27MHz @100kHz offset 27MHz @1MHz offset PLL502-26 Preliminary MIN. TYP. MAX. 27 0.65 - 1.5 1.15 3.7 0.5 1 MIN. TYP. MAX. ...
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... XIN DD Ouput load of 10pF 12mA 12mA 4mA OH At TTL level Human Body Model SYMBOL MIN. F XIN C (xtal PLL502-26 Preliminary MIN. TYP. MAX 3.13* 3.47* 2.4 0.4 V – 0 3.3 3000 TYP. MAX. UNITS 9.5 pF 250 ...
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... Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 SOIC Max. 1.75 0.25 0.51 0.25 10.00 4.00 6.20 1. PART NUMBER PLL502 Marking Package P502-26SC 16SOIC P502-26SC 16SOIC (Tape & Reel) PLL502-26 Preliminary TEMPERATURATURE C=COMMERCIAL PACKAGE TYPE S=SOIC t Rev 09/26/03 Page 5 ...