MTD10N10ELT4G ONSEMI [ON Semiconductor], MTD10N10ELT4G Datasheet

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MTD10N10ELT4G

Manufacturer Part Number
MTD10N10ELT4G
Description
TMOS E−FET Power Field Effect Transistor DPAK for Surface Mount
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MTD10N10ELT4G
Manufacturer:
ON/安森美
Quantity:
20 000
MTD10N10EL
TMOS E−FET™
Power Field Effect Transistor
DPAK for Surface Mount
N−Channel Enhancement−Mode Silicon
Gate
in the avalanche and commutation modes. The new energy efficient
design also offers a drain−to−source diode with a fast recovery time.
Designed for low voltage, high speed switching applications in power
supplies, converters and PWM motor controls, these devices are
particularly well suited for bridge circuits where diode speed and
commutating safe operating areas are critical and offer additional
safety margin against unexpected voltage transients.
Features
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using minimum recommended pad
2. When surface mounted to an FR4 board using 0.5 sq in pad size.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 3
MAXIMUM RATINGS
Drain−to−Source Voltage
Drain−to−Gate Voltage (R
Gate−to−Source Voltage − Continuous
Non−Repetitive (t
Drain Current
Total Power Dissipation @ T
Derate above 25°C
Total Power Dissipation @ T
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting T
(V
L = 1.0 mH, R
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Temperature for Soldering
Purposes, 1/8″ from case for 10 sec
This advanced TMOS E−FET is designed to withstand high energy
Fast Recovery Diode
Avalanche Energy Specified
Source−to−Drain Diode Recovery Time Comparable to a Discrete
Diode is Characterized for Use in Bridge Circuits
I
Pb−Free Package is Available
size.
DD
DSS
= 25 Vdc, V
and V
G
DS(on)
= 25 W)
− Continuous
− Continuous @ 100°C
− Single Pulse (t
GS
p
Parameter
≤ 10 ms)
J
= 5.0 Vdc, I
= 25°C
Specified at Elevated Temperature
(T
GS
C
A
C
= 25°C unless otherwise noted)
= 1.0 MW)
= 25°C (Note 2)
= 25°C
L
p
= 10 Apk,
≤ 10 ms)
Symbol
T
V
V
V
R
R
R
J
V
E
I
GSM
P
DGR
, T
T
DSS
I
I
DM
θJC
θJA
θJA
GS
D
D
AS
D
L
stg
−55 to
Value
0.32
1.75
3.13
71.4
100
100
±15
±20
150
100
260
6.0
10
35
40
50
1
W/°C
°C/W
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
mJ
°C
°C
W
W
†For information on tape and reel specifications,
MARKING DIAGRAM & PIN ASSIGNMENTS
MTD10N10ELT4
MTD10N10ELT4G
1 2
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
V
100 V
3
Device
DSS
(Surface Mount)
CASE 369C
10N10EL = Device Code
Y
WW
G
ORDERING INFORMATION
STYLE 2
4
DPAK
G
http://onsemi.com
R
N−Channel
(Pb−Free)
Package
DS(ON)
= Year
= Work Week
= Pb−Free Package
0.22 W
DPAK
DPAK
D
Drain 2
Source 3
Publication Order Number:
Gate 1
S
TYP
2500 Tape & Reel
2500 Tape & Reel
YWW
10ELG
MTD10N10EL/D
Shipping
10N
I
D
10 A
MAX
Drain
4

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MTD10N10ELT4G Summary of contents

Page 1

... °C/W Device R 3.13 θJC MTD10N10ELT4 R 100 θJA R 71.4 θJA MTD10N10ELT4G °C T 260 L †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 1 http://onsemi.com R TYP DS(ON) I MAX D 0. N− ...

Page 2

ELECTRICAL CHARACTERISTICS Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage ( Vdc 0.25 mAdc Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (V = 100 Vdc Vdc 100 Vdc, ...

Page 3

TYPICAL ELECTRICAL CHARACTERISTICS 25° DRAIN−TO−SOURCE VOLTAGE (VOLTS) DS Figure 1. On−Region Characteristics 0. 100°C 0.25 T ...

Page 4

Switching behavior is most easily modeled and predicted by recognizing that the power MOSFET is charge controlled. The lengths of various switching intervals (Dt) are determined by how fast the FET input capacitance can be charged by current from the ...

Page 5

TOTAL GATE CHARGE (nC) G Figure 8. Gate−To−Source and Drain−To−Source Voltage versus Total Charge DRAIN−TO−SOURCE DIODE CHARACTERISTICS ...

Page 6

SINGLE PULSE T = 25° 100 LIMIT DS(on) THERMAL LIMIT PACKAGE LIMIT 0.1 0 DRAIN−TO−SOURCE VOLTAGE (VOLTS) DS Figure 11. Maximum ...

Page 7

0.13 (0.005) *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, ...

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