CS4222-BS CIRRUS [Cirrus Logic], CS4222-BS Datasheet
CS4222-BS
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CS4222-BS Summary of contents
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... Volume control changes are implemented using a "soft" ramping or zero crossing technique. Applications include reverb processors, musical instru- ments, DAT, and multitrack recorders. The CS4222 is packaged in a 28-pin plastic SSOP. ORDERING INFORMATION CS4222-KS CS4222-BS CS4222-DS CDB4222 SDA/CDIN AD0/CS SMUTE MCLK Control Port Left ...
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... I C system. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trade- marks or service marks of their respective owners. 2 CS4222 2 C Patent Rights to use DS236F1 ...
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... LIST OF FIGURES Figure 1. Serial Audio Interface Timing........................................................................................... 9 Figure 2. Control Port Timing - SPI Mode ..................................................................................... 10 Figure 3. Control Port Timing - I2C Mode ..................................................................................... 11 Figure 4. CS4222 Recommended Connection Diagram............................................................... 13 Figure 5. Optional Line Input Buffer .............................................................................................. 15 Figure 6. Full Scale Input/Output Voltage ..................................................................................... 15 Figure 7. 2- and 3-Pole Butterworth Filters ................................................................................... 17 Figure 8. Hybrid Analog/Digital Attenuation .................................................................................. 18 Figure 9 ...
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... PIN DESCRIPTION NC SMUTE MCLK LRCK SCLK VD DGND SDOUT SDIN SCL/CCLK SDA/CDIN AD0/CS DEM0 CS4222 NC RST AOUTL- AOUTL+ AOUTR+ AOUTR- AGND VA AINL+ AINL- DEM1 AINR+ AINR- NC DS236F1 ...
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... SPI mode. This pin should be tied to DGND in stand-alone mode. AD0/CS 12 Address Bit/Control Chip Select (Input used to enable the control port interface on the CS4222. The CS4222 will enter SPI mode if a negative transition is ever seen on this pin after power up. This pin should be tied to DGND in stand-alone mode. DEM0 13 De-emphasis Control (Input) - Selects the standard 15µ ...
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... DGND = 0 V; all voltages with respect to 0 V.) Symbol Min VA 4.75 VD 4.75 -KS - -BS/-DS -40 (AGND = 0 V; all voltages with respect to AGND. Operation Symbol Min Analog VA -0.3 Digital VD -0 (Note 1) in -0.7 -0 -65 stg CS4222 Nom Max Units 5.0 5.25 V 5.0 5.25 V °C - +70 °C - +85 Max Units 6.0 V 6.0 V ±10 mA VA+0.7 V VD+0.7 V 125 °C 150 °C DS236F1 ...
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... Input test CS4222-KS Min Typ Max (Note -90 -86 - - kHz 0 ±100 - 1.82 2 -0.01 dB corner (Note -0 CS4222 CS4222-BS/-DS Min Typ Max -90 - ±100 - 1.82 2.0 2. 2.3 - Min Typ Max 0 - 0.4535 -0.01 - +0.01 0.625 - - ...
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... Input CS4222-KS Min Typ A-weighted 93 99 unweighted -88 - -76 - -36 - 110 (1 kHz 0.35 0.5 110 113.5 - ±10 - 0.1 - ±100 1.9 2 0.01 dB corner (Note 7) CS4222 = 10 kΩ CS4222-BS/-DS Max Min Typ Max - -84 - - 110 - - - 90 - 0.65 0.35 0.5 0.65 - 110 113 ± 0.1 ...
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... MCLK = 512 Fs MCLK = 384 Fs MCLK = 256 Fs MCLK = 512 Fs MCLK = 384 Fs MCLK = 256 Fs (DSCK = 0) (DSCK = 0) (DSCK = 0) (DSCK = 0) (DSCK = lrckd lrcks sckh lrpd ds dh MSB Figure 1. Serial Audio Interface Timing CS4222 Symbol Min Max 10 - 1.014 25 128xFs ...
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... Figure 2. Control Port Timing - SPI Mode CS4222 (Inputs: Min Max Unit - 6 MHz 500 - ns 500 - ns 1.0 - µ ...
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... DS236F1 Symbol f scl t irs t buf t hdst t low t high t sust t (Note 11) hdd t sud susp t high Figure 3. Control Port Timing - I CS4222 2 C) (Continued) Min Max - 100 500 - 4.7 - 4.0 - 4.7 - 4 250 - - 1 - 300 4 SCL ...
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... All Supplies = kHz PSRR RMS Symbol Min - - - (AGND = DGND = 0 V; all voltages with respect to 0 V.) Symbol CS4222 Min Typ Max Units µA - 200 - - Typ Max Units µA ...
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... Figure 4. CS4222 Recommended Connection Diagram DS236F1 Ω µ ...
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... AC coupled optional input buffer which combines level shifting with single-ended to differential conversion. Analog inputs must be DC coupled into the CS4222 with a 2.3 V common mode input voltage. Any DC offset at the input to the CS4222 will be removed by the internal high-pass filters (see Figure 6 for the differential input signal description) ...
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... CS4222 AIN+/AOUT+ AIN +/AOUT- DS236F1 Figure 5. Optional Line Input Buffer Full Scale Input level = (AIN+) - (AIN-)= 5.66 Vpp Full Scale O utput level = (AOUT+) - (AOUT-)= 5.66 Vpp Figure 6. Full Scale Input/Output Voltage CS4222 (2.3 + 1.4)V 2.3V (2.3 - 1.4)V (2.3 + 1.4)V 2.3V (2.3 - 1.4)V 15 ...
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... The characteristics of this first-order high pass filter are outlined below for Fs equal to 48 kHz. The filter response scales linearly with sample rate. The high pass filter in the CS4222 may be de- feated independently for the left and right channels by writing HPDR and HPDL in the ADC control byte (#1). ...
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... DS236F1 Figure 7. 2- and 3-Pole Butterworth Filters CS4222 17 ...
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... Figure 8). The CS4222 implements a "soft" volume control whereby level changes are achieved by ramping from the current level to the new level in 0.5 dB steps. The default rate of volume change is 8 LRCK cycles for each 0.5 dB step (equivalent to 647 µ ...
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... S compatible depending on the state of the DDO bit. The input data format is set with the DDI bits to be left or right justified or I data from the CS4222 may be set via the DSCK bit in the DSP Port Mode Byte (#5). The default input and output format for the CS4222 is I DS236F1 Table 3 ...
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... Left MSB LSB Left MSB LSB Left LSB Figure 9. Audio DSP Data Input Formats. Left MSB LSB Left MSB LSB CS4222 Rig LSB Rig ht MSB LSB Right LSB SCLK s Right MS B LSB Right MSB LSB ...
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... SPI mode will be selected. 4.6.1 SPI Mode In SPI mode the CS4222 chip select signal, CCLK is the control port bit clock, CDIN is the input data line from the microcontroller and the chip address is 0010000. All signals are inputs and data is clocked in on the rising edge of CCLK ...
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... In order to communicate with the CS4222, the LSB of the chip address field (first byte sent to the CS4222) should match the setting of the AD0 pin. The eighth bit of the address byte is the R/W bit (high for a read, low for a write). If the operation is a write, the next byte is the Memory Address Pointer which selects the register to be read or written ...
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... Additionally, the PDAD (ADC Control Byte #1) and PDDA (DAC Control Byte #2) bits can be used to power down the ADC’s and DAC’s independently. If both are set to 1, the CS4222 will power down the entire chip. The control port will retain its current settings. ...
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... ADC and DAC Filter Response Plots Figures 14 through 19 show the overall frequency response, passband ripple and transition band for the CS4222 ADCs and DACs. Figure 14. ADC Filter Response Figure 16. ADC Transition Band Figure 18. DAC Passband Ripple 24 Figure 15. ADC Passband Ripplee Figure 17. DAC Filter Response Figure 19 ...
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... Rising edge initiates calibration The following bits are read only: CALP Calibration status 0 - Calibration done 1 - Calibration in progress CLKE Clocking Error error 1 - error This register defaults to 00h. DS236F1 ADMR ADML CS4222 MAP2 MAP1 MAP0 CAL CALP CLKE 25 ...
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... B7 B6 ATT7 ATT6 ATT5 ATT7-ATT0 Sets attenuator level attenuation 227 - 113.5 dB attenuation >227 - DAC muted ATT0 represents 0 attenuation This register defaults to 00h MUTL SOFT ATT4 ATT3 CS4222 RMP1 RMP0 ATT2 ATT1 ATT0 DS236F1 ...
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... LVL2-0 and LVR2-0 bits are 'sticky'. They constantly monitor the ADC output for the peak levels and hold the max- imum output. They are reset to 0 when the DSP Port Mode Byte (5) is read. This register is read only. DS236F1 DSCK DDO LVR1 LVR0 CS4222 DDF2 DDF1 DDF0 LVL2 LVL2 LVL0 27 ...
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... The change in gain value with temperature. Units in ppm/°C. Offset Error For the ADCs, the deviation in LSB's of the output from mid-scale with the selected inputs tied to a com- mon potential. For the DAC's, the differential output voltage with mid-scale input code. Units are in volts. 28 CS4222 DS236F1 ...
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... A2 A ∝ SEATING PLANE SIDE VIEW INCHES MIN MAX MIN -- 0.084 0.002 0.010 0.05 0.064 0.074 1.62 0.009 0.015 0.22 0.390 0.413 9.90 0.291 0.323 7.40 0.197 0.220 5.00 0.024 0.027 0.61 0.025 0.040 0.63 0° 8° CS4222 1 E1 END VIEW L MILLIMETERS NOTE MAX -- 2.13 0.25 1.88 0.38 15,16 10.50 14 8.20 5.60 14 0.69 1.03 0° 8° 29 ...