CS4382A-EQZ CIRRUS [Cirrus Logic], CS4382A-EQZ Datasheet - Page 17

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CS4382A-EQZ

Manufacturer Part Number
CS4382A-EQZ
Description
114 dB, 192 kHz 8-channel D/A Converter
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
DS618PP1
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI
(Inputs: Logic 0 = GND, Logic 1 = VLC, C
Notes:
CCLK Clock Frequency
RST Rising Edge to CS Falling
CCLK Edge to CS Falling
(Note 17)
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
(Note 18)
Rise Time of CCLK and CDIN
(Note 19)
Fall Time of CCLK and CDIN
(Note 19)
17. t
18. Data must be held for sufficient time to bridge the transition time of CCLK.
19. For F
spi
only needed before first falling edge of CS after RST rising edge. t
SCK
CCLK
CDIN
RST
CS
< 1 MHz.
Parameter
t srs
t spi
Figure 4. Control Port Timing - SPI Format
t r2
t css
L
= 30 pF)
t scl
t f2
t dsu t
t sch
dh
Symbol
f
t
t
t
t
t
t
t
sclk
t
csh
css
sch
dsu
t
t
srs
spi
scl
dh
r2
f2
Min
500
500
spi
1.0
20
66
66
40
15
-
-
-
= 0 at all other times.
FORMAT
t csh
Max
100
100
6
-
-
-
-
-
-
-
-
CS4382A
MHz
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
17

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