CS4382A-EQZ CIRRUS [Cirrus Logic], CS4382A-EQZ Datasheet - Page 2

• Manufacturer Part Number: CS4382A-EQZ
• Description: 114 dB, 192 kHz 8-channel D/A Converter
• Manufacturer: CIRRUS [Cirrus Logic]

2
TABLE OF CONTENTS
1. PIN DESCRIPTION..................................................................................................................... 6
2. CHARACTERISTICS AND SPECIFICATIONS.......................................................................... 8
3. APPLICATIONS ....................................................................................................................... 20
4. REGISTER QUICK REFERENCE ............................................................................................ 31
5. REGISTER DESCRIPTION ...................................................................................................... 32
3.1 Master Clock..................................................................................................................... 20
3.2 Mode Select...................................................................................................................... 20
3.3 Digital Interface Formats .................................................................................................. 22
3.4 Oversampling Modes........................................................................................................ 23
3.5 Interpolation Filter ............................................................................................................. 23
3.6 De-Emphasis .................................................................................................................... 23
3.7 ATAPI Specification .......................................................................................................... 24
3.8 Direct Stream Digital (DSD) Mode.................................................................................... 25
3.9 Grounding and Power Supply Arrangements ................................................................... 25
3.10 Analog Output and Filtering ............................................................................................ 25
3.11 Mute Control ................................................................................................................... 26
3.12 Recommended Power-Up Sequence ............................................................................. 27
3.13 Recommended Procedure for Switching Operational Modes......................................... 27
3.14 Control Port Interface ..................................................................................................... 28
3.15 Memory Address Pointer (MAP)
5.1 Mode Control 1 (address 01h) .......................................................................................... 32
5.2 Mode Control 2 (address 02h) ......................................................................................... 33
5.3 Mutec Pin Control (MUTEC) ............................................................................................. 35
5.4 Filter Control (address 04h) ............................................................................................. 36
5.5 Invert Control (address 05h) ............................................................................................ 37
5.6 Mixing Control Pair 1 (Channels A1 & B1)(address 06h)
3.9.1 Capacitor Placement............................................................................................ 25
3.12.1 Hardware Mode ................................................................................................. 27
3.12.2 Software Mode................................................................................................... 27
3.14.1 MAP Auto Increment.......................................................................................... 28
3.14.2 I
3.14.3 SPI™ Mode........................................................................................................ 30
5.1.1 Control Port Enable (CPEN) ................................................................................ 32
5.1.2 Freeze Controls (Freeze)..................................................................................... 32
5.1.3 Master Clock DIVIDE ENABLE (mclkdiv) ............................................................ 32
5.1.4 DAC Pair Disable (DACx_DIS) ............................................................................ 32
5.1.5 Power Down (PDN).............................................................................................. 33
5.2.1 Digital Interface Format (dif) ................................................................................ 33
5.2.2 Mode Control 3 (address 03h) ............................................................................ 34
5.2.3 Soft Ramp AND Zero Cross CONTROL (SZC) ................................................... 34
5.2.4 Single Volume Control (Snglvol) .......................................................................... 34
5.2.5 Soft Volume Ramp-Up after Error (RMP_UP) ..................................................... 35
5.2.6 MUTEC Polarity (MUTEC+/-)............................................................................... 35
5.2.7 Auto-Mute (AMUTE) ........................................................................................... 35
5.4.1 Interpolation Filter Select (FILT_SEL).................................................................. 36
5.4.2 De-Emphasis Control (DEM) ............................................................................... 36
5.4.3 Soft Ramp-Down before Filter Mode Change (RMP_DN) ................................... 36
5.5.1 Invert Signal Polarity (Inv_Xx).............................................................................. 37
Mixing Control Pair 2 (Channels A2 & B2)(address 09h)
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3.14.2.1 I
3.14.2.2 I
3.14.3.1 SPI Write............................................................................................ 30
C Mode............................................................................................................ 28
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2
C Write ............................................................................................ 28
C Read ............................................................................................ 29
............................................................................... 30
CS4382A
DS618PP1