SN74LS259 ONSEMI [ON Semiconductor], SN74LS259 Datasheet - Page 3

• Manufacturer Part Number: SN74LS259
• Description: LOW POWER SCHOTTKY
• Manufacturer: ONSEMI [ON Semiconductor]

X = Don’t Care Condition
L = LOW Voltage Level
H = HIGH Voltage Level
Q
H
FUNCTIONAL DESCRIPTION
the mode selection table. In the addressable latch mode, data
on the Data line (D) is written into the addressed latch.The
addressed latch will follow the data input with all
non-addressed latches remaining in their previous states. In
the memory mode, all latches remain in their previous state
and are unaffected by the Data or Address inputs.
addressed output will follow the state of the D input with all
E
H
L
L
N–1
The SN74LS259 has four modes of operation as shown in
In the one-of-eight decoding or demultiplexing mode, the
H
H
C
L
L
= Previous Output State
MODE SELECTION
Addressable Latch
Memory
Active HIGH Eight-Channel
Demultiplexer
Clear
Q
0
4
14
E
MODE
D
13
Q
1
5
1
C E D A
H H X
H I
H L H
H L L
H L H
H L L
H L H
L H X
L L L
L L H
L L L
L L H
L L H
A
Q
0
2
6
I
2
H
H
H
H
H
H
H
X
L
L
X
L
L
A
0
1
A
X
H
X
H
H
L
L
L
L
L
L
L
L
A
1
Q
2
3
3
http://onsemi.com
LOGIC DIAGRAM
7
A
X
H
X
H
H
L
L
L
L
L
L
L
L
SN74LS259
2
Q
Q
Q
Q
Q
Q
H
N–1
H
N–1
N–1
N–1
N–1
L
L
L
L
L
L
0
3
Q
other inputs in the LOW state. In the clear mode all outputs
are LOW and unaffected by the address and data inputs.
changing more then one bit of the address could impose a
transient wrong address. Therefore, this should only be done
while in the memory mode.
15
4
Q
Q
9
When operating the SN74LS259 as an addressable latch,
The truth table below summarizes the operations.
Q
C
PRESENT OUTPUT STATES
H
N–1
N–1
H
L
L
L
L
L
L
1
TRUTH TABLE
Q
Q
Q
Q
Q
N–1
N–1
N–1
N–1
L
L
L
L
L
L
2
Q
5
10
Q
Q
N–1
L
L
L
L
L
L
3
Q
L
L
L
L
L
L
4
Q
6
11
Q
L
L
L
L
L
L
5
V
GND = PIN 8
CC
Q
Q
= PIN NUMBERS
Q
= PIN 16
N–1
N–1
L
L
L
L
L
L
6
Q
7
12
Q
H
H
L
L
L
L
L
L
7
Clear
Demultiplex
Memory
Addressable
Latch
MODE