SN74LS256D MOTOROLA [Motorola, Inc], SN74LS256D Datasheet - Page 4

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SN74LS256D

Manufacturer Part Number
SN74LS256D
Description
DUAL 4-BIT ADDRESSABLE LATCH
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
AC SET-UP REQUIREMENTS
A 1
A 1
Q 1
t s
t s
t h
t h
t W
NOTES:
1. The Address to Enable Setup Time is the time before the HIGH-to-LOW Enable transition that the Address must be stable so that the correct latch is
2. The shaded areas indicate when the inputs are permitted to change for predictable output performance.
Symbol
Symbol
C
Q
D
E
Q
Figure 1. Turn-on and Turn-off Delays, Enable To
addressed and the other latches are not affected.
OTHER CONDITIONS: E = H
Figure 5. Turn-on Delay, Clear to Output
OTHER CONDITIONS: E = L, CL = L, D = H
OTHER CONDITIONS: CL = H, A = STABLE
Figure 3. Turn-on and Turn-off Delays,
Output and Enable Pulse Width
t PHL
t pw
Data Setup Time
Address Setup Time
Data Hold Time
Address Hold Time
Enable Pulse Width
1.3 V
1.3 V
Address to Output
1.3 V
Parameter
Parameter
t PHL
(T A = 25 C)
1.3 V
t PLH
1.3 V
t pw
t PHL
1.3 V
1.3 V
1.3 V
1.3 V
FAST AND LS TTL DATA
SN54/74LS256
1.3 V
Min
20
15
15
0
0
AC WAVEFORMS
t PLH
Limits
5-424
Typ
D
Q
A
E
Q
D
E
Max
OTHER CONDITIONS: CL = H
Figure 4. Setup and Hold Time, Data to Enable
Figure 6. Setup Time, Address to Enable
OTHER CONDITIONS: E = L, CL = H, A = STABLE
Figure 2. Turn-on and Turn-off Delays,
OTHER CONDITIONS: C = H, A = STABLE
Unit
Unit
ns
ns
ns
ns
ns
Q=D
t s (H)
1.3 V
(See Notes 1 and 2)
Figures 4 & 6
Figures 4 & 6
Data to Output
Figure 4
Figure 6
Figure 1
1.3 V
t s
t PHL
1.3 V
t h (H)
Test Conditions
Test Conditions
1.3 V
STABLE ADDRESS
1.3 V
t h
t s (L)
Q=D
V CC = 5.0 V
V CC = 5.0 V
V CC = 5.0 V
CC = 5.0 V
1.3 V
t PLH
1.3 V
t h (L)

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