MC74HC132ADTG ON Semiconductor, MC74HC132ADTG Datasheet

IC GATE NAND QUAD 2INP 14-TSSOP

MC74HC132ADTG

Manufacturer Part Number
MC74HC132ADTG
Description
IC GATE NAND QUAD 2INP 14-TSSOP
Manufacturer
ON Semiconductor
Series
74HCr
Datasheet

Specifications of MC74HC132ADTG

Logic Type
NAND Gate - Schmitt Trigger
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Product
NAND
Logic Family
74HC
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
125 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MC74HC132A
Quad 2−Input NAND Gate
with Schmitt−Trigger Inputs
High−Performance Silicon−Gate CMOS
inputs are compatible with standard CMOS outputs; with pull−up
resistors, they are compatible with LSTTL outputs.
slowly changing waveforms.
Features
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 12
The MC74HC132A is identical in pinout to the LS132. The device
The HC132A can be used to enhance noise immunity or to square up
Standard No. 7A
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements as Defined by JEDEC
Chip Complexity: 72 FETs or 18 Equivalent Gates
Pb−Free Packages are Available
Figure 1. Pin Assignment
GND
A1
B1
Y1
A2
B2
Y2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
B4
A4
Y4
B3
A3
Y3
CC
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
(Note: Microdot may be in either location)
ORDERING INFORMATION
A
L, WL
Y, YY
W, WW = Work Week
G or G
FUNCTION TABLE
http://onsemi.com
A
H
H
L
L
Inputs
CASE 751A
SOEIAJ−14
D SUFFIX
CASE 948G
CASE 965
F SUFFIX
SOIC−14
TSSOP−14
DT SUFFIX
CASE 646
= Assembly Location
= Wafer Lot
= Year
= Pb−Free Package
N SUFFIX
PDIP−14
B
H
H
Publication Order Number:
L
L
14
14
14
1
1
1
Output
H
H
H
MC74HC132A/D
Y
L
MC74HC132AN
14
DIAGRAMS
AWLYYWWG
MARKING
1
74HC132A
AWLYWW
HC132AG
ALYWG
ALYWG
132A
HC
G

Related parts for MC74HC132ADTG

MC74HC132ADTG Summary of contents

Page 1

MC74HC132A Quad 2−Input NAND Gate with Schmitt−Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A ...

Page 2

ORDERING INFORMATION Device MC74HC132AN MC74HC132ANG MC74HC132AD MC74HC132ADG MC74HC132ADR2 MC74HC132ADR2G MC74HC132ADT MC74HC132ADTR2 MC74HC132ADTR2G MC74HC132AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is ...

Page 3

... Tested to EIA/JESD22−A114−A. 2. Tested to EIA/JESD22−A115−A. 3. Tested to JESD22−C101−A. 4. Tested to EIA/JESD78. 5. For high frequency or heavy load considerations, see Chapter 2the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Symbol Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 4

... V max T− 9. Information on typical parametric values can be found in the ON Semiconductor High−Speed CMOS Data Book (DL129/D). MC74HC132A (Voltages Referenced to GND) Test Conditions Î Î Î Î Î Î Î Î Î Î Î Î Î 0.1 V ...

Page 5

... For propagation delays with loads other than 50 pF, and information on typical parametric values, see the ON Semiconductor High−Speed CMOS Data Book (DL129/D). C ...

Page 6

V Figure 5. Typical Input Threshold OUT (a) A SCHMITT TRIGGER SQUARES UP INPUTS (a) WITH SLOW RISE AND FALL TIMES Figure 6. Typical Schmitt−Trigger Applications MC74HC132A 3 4 ...

Page 7

−T− SEATING PLANE 0.13 (0.005) MC74HC132A PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ...

Page 8

... G −T− K SEATING PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MC74HC132A PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 9

... −V− C 0.10 (0.004) SEATING −T− PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MC74HC132A PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 10

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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