LTC3735 LINER [Linear Technology], LTC3735 Datasheet - Page 28

• Manufacturer Part Number: LTC3735
• Description: 2-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs
• Manufacturer: LINER [Linear Technology]

LTC3735
Figure 14 shows a typical application using the LTC3735
to power the mobile CPU core. The input can vary from
5V to 24V; the output voltage can be programmed from
0.7V to 1.708V with a maximum current of 32A. By only
modifying the external MOSFET and inductor selection,
higher load current capability (up to 40A) can be achieved.
The power supply in Figure 14 receives a VRON signal for
ON/OFF control. After soft-start, the output voltage is set
at 1.2V until the assertion of the MCH_PG signal. After
about a 50µs delay, the VID5-VID0 bits gain the control
over the output voltage and program it between 0.7V and
5V
TYPICAL APPLICATION
28
V
PGOOD
OA
V
+
RON
Si1034X
470pF
232k
100pF
1µF
X5R
4.7µF
X5R
3.3V
5V
100k
2k
3.3k
SW2
SW1
V
Figure 14. 5V to 24V Input, 0.7V to 1.708V Output, 32A IMVP-IV Compatible Power Supply
CCP
V
OUT
_PG/MCH_PG
0.1µF
0.1µF
1000pF
DPRSLPVR
STP_CPUB
1M
47pF
BAT54
PSIB
VID0
VID1
VID2
VID3
VID4
VID5
470pF
36
19
20
21
22
23
24
35
17
16
28
34
31
2
8
4
3
9
1
MCH_PG
DPRSLPVR
STP_CPUB
PSIB
FREQSET
VID0
VID1
VID2
VID3
VID4
VID5
PGOOD
I
RUN/SS
SGND
V
PV
BOOST1
BOOST2
TH
FB
CC
LTC3735
RDPRSLP
SENSE1
SENSE1
SENSE2
SENSE2
RDPSLP
RBOOT
OAOUT
PGND
V
V
SW1
SW2
BG1
BG2
TG1
TG2
OA
OA
+
–
+
–
+
–
33
32
27
26
10
11
30
29
25
12
13
18
14
15
5
7
6
56.2k
13.3k
1nF
1nF
1.27M
12.7k
Q1
Q2
Q3
Q4
1.708V. When the STP_CPUB signal is low, a deep sleep
state is indicated and the output voltage is decreased by
about 1.04%. When the DPRSLPVR signal is high, a deeper
sleep state is indicated and the output voltage becomes
0.748V regardless of the states of the VID bits. Active
voltage positioning is accomplished with a resistor from
the I
AVP slope while higher resistance provides a flatter slope.
Finally, the PGOOD output is masked for 110µs during VID
change or state transition.
10
1M 1%
549k
1µF
1µF
D1
D2
V
OA
TH
0.8µH
0.8µH
13.3k
10
+
100
L1
L2
PSIB
to the V
S1
0.002
S1
0.002
S2
10
+
100
+
+
S2
OA
+
10
+
C5: PANSONIC SP CAPS EEFSX0D181R
D1, D2: B340A
L1, L2: CDEP 104-OR8MC-L
Q1, Q3: IRF7811W OR Si7860DP
Q2, Q4: IRF7811W ¥2 OR Si7856DP
pin. Lower resistance yields a steeper
3.3V
OR SANYO POSCAP 2R5TPE220M9
249k
80.6k
1M
MMBT3904
PGOOD
2.2µF
2N7002
+
3.3V
2k
C1
10µF ×4
35V X5R
C5
×3
CLK_EN#
BAT54C
4.12k
43.2k
V
1µF
RON
3.3V
V
5V ~ 24V
V
0.7V ~ 1.708V
AT 32A
MMBT3904
IN
OUT
1.9k
3735 F14
IMVP4_PG
3735fa