CY7C1049CV33-10VI Cypress Semiconductor, CY7C1049CV33-10VI Datasheet

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CY7C1049CV33-10VI

Manufacturer Part Number
CY7C1049CV33-10VI
Description
512K x 8 Static RAM
Manufacturer
Cypress Semiconductor
Datasheet
1.CY7C1049CV33-10VI.pdf (7 pages)
Cypress Semiconductor Corporation
Document #: 38-05006 Rev. *B
Features
Functional Description
The CY7C1049CV33 is a high-performance CMOS Static
RAM organized as 524,288 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and three-state drivers.
Selection Guide
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Notes:
• High speed
• Low active power
• 2.0V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
CE
WE
1.
2.
OE
Logic Block Diagram
— t
— 324 mW (max.)
A
A
A
A
A
A
A
A
A
A
A
For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.
Shaded areas contain advance information.
10
0
1
2
3
4
5
6
7
8
9
AA
= 10 ns
INPUT BUFFER
DECODER
COLUMN
512K x 8
ARRAY
[1]
POWER
DOWN
Commercial
Industrial
Commercial / Industrial
•
3901 North First Street
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a Write
operation (CE LOW, and WE LOW).
The CY7C1049CV33 is available in standard 400-mil-wide
36-pin SOJ package and 44-pin TSOP II package with center
power and ground (revolutionary) pinout.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
GND
-8
100
110
•
I/O3
I/O
I/O
V
I/O
10
WE
8
CE
[2]
CC
A
A
A
A
A
A
A
A
A
A
0
0
1
2
3
4
0
1
2
5
6
7
8
9
San Jose
through I/O
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
10
11
12
Top View
SOJ
512K x 8 Static RAM
100
-10
10
90
10
Pin Configuration
7
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
•
) is then written into the location
CA 95134
NC
NC
A
A
A
A
OE
I/O
I/O
GND
V
I/O
I/O
A
A
A
A
A
0
18
17
16
15
CC
14
13
12
11
10
Revised September 13, 2002
0
through I/O
7
6
5
4
-12
12
85
95
10
through A
CY7C1049CV33
A
CE
I/O
I/O
V
I/O
I/O
WE
A
V
A
A
A
A
NC
NC
A
CC
4
5
NC
NC
A
A
A
SS
7
8
9
6
3
0
1
2
0
1
2
3
Top View
13
14
15
16
17
18
19
20
21
22
•
1
2
3
4
5
6
7
8
9
10
11
12
18
TSOP II
7
) are placed in a
).
-15
15
80
90
10
408-943-2600
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
A
A
A
A
OE
I/O
I/O
V
V
I/O
I/O
A
A
A
A
A
NC
NC
NC
NC
Unit
mA
mA
mA
SS
CC
11
10
18
17
16
15
14
13
12
ns
7
6
5
4

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CY7C1049CV33-10VI Summary of contents

Page 1

... TTL-compatible inputs and outputs • Easy memory expansion with CE and OE features [1] Functional Description The CY7C1049CV33 is a high-performance CMOS Static RAM organized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. ...

Page 2

... CC CE > V – 0.3V > V – 0.3V < 0.3V Test Conditions MHz 3. pF* 1.5V (a) High-Z characteristics: 90% 10% (c) Fall Time: 1 V/ns CY7C1049CV33 [3] .................................... –0. [3] ................................ –0. Ambient Temperature +70 C – +85 C [2] -10 -12 2.4 2.4 2.4 0.4 0.4 0.4 V 2.0 V 2 0.3 + 0.3 + 0.3 0.8 – ...

Page 3

... OHA is less than less than t HZCE LZCE HZOE LZOE . IL CY7C1049CV33 -10 -12 -15 Max. Min. Max. Min. Max ...

Page 4

... During this period the I/Os are in the output state and input signals should not be applied. Document #: 38-05006 Rev ACE t DOE t LZOE 50% [15, 16 SCE PWE t SD DATA CY7C1049CV33 t HZOE t HZCE DATA VALID VALID IN HIGH IMPEDANCE Page ...

Page 5

... Truth Table I High Data Out Data High-Z Ordering Information Speed (ns) Ordering Code 10 CY7C1049CV33-10VC CY7C1049CV33-10ZC CY7C1049CV33-10VI CY7C1049CV33-10ZI 12 CY7C1049CV33-12VC CY7C1049CV33-12ZC CY7C1049CV33-12VI CY7C1049CV33-12ZI 15 CY7C1049CV33-15VC CY7C1049CV33-15ZC CY7C1049CV33-15VI CY7C1049CV33-15ZI Document #: 38-05006 Rev. *B [16 SCE PWE t HZWE –I/O Mode 0 7 ...

Page 6

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 36-lead (400-mil) Molded SOJ V36 44-pin TSOP II Z44 CY7C1049CV33 51-85090-*B 51-85087-*A Page ...

Page 7

... Document History Page Document Title: CY7C1049CV33 512K x 8 Static RAM Document Number: 38-05006 Issue REV. ECN NO. Date ** 112569 03/06/02 *A 114091 04/25/02 *B 116479 09/16/02 Document #: 38-05006 Rev. *B Orig. of Change Description of Change HGK New Data Sheet DFP Changed Tpower unit from CEA Add applications foot note to data sheet, page 1. ...

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