MM74HC273M Fairchild, MM74HC273M Datasheet

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MM74HC273M

Manufacturer Part Number
MM74HC273M
Description
Octal D-Type Flip-Flops with Clear
Manufacturer
Fairchild
Datasheet

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Price
Part Number:
MM74HC273MTC
Manufacturer:
Fairchild Semiconductor
Quantity:
135
Part Number:
MM74HC273MTCX
Manufacturer:
INNOCHIPS
Quantity:
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© 1999 Fairchild Semiconductor Corporation
MM74HC273M
MM74HC273SJ
MM74HC273MTC
MM74HC273N
MM74HC273
Octal D-Type Flip-Flops with Clear
General Description
The MM74HC273 edge triggered flip-flops utilize advanced
silicon-gate CMOS technology to implement D-type flip-
flops. They possess high noise immunity, low power, and
speeds comparable to low power Schottky TTL circuits.
This device contains 8 master-slave flip-flops with a com-
mon clock and common clear. Data on the D input having
the specified setup and hold times is transferred to the Q
output on the LOW-to-HIGH transition of the CLOCK input.
The CLEAR input when LOW, sets all outputs to a low
state.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
MTC20
M20D
M20B
N20A
Pin Assignments for DIP, SOIC, SOP and TSSOP
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-153, 0.300” Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
DS005331.prf
Top View
Each output can drive 10 low power Schottky TTL equiva-
lent loads. The MM74HC273 is functionally as well as pin
compatible to the 74LS273. All inputs are protected from
damage due to static discharge by diodes to V
ground.
Features
Typical propagation delay: 18 ns
Wide operating voltage range
Low input current: 1 A maximum
Low quiescent current: 80 A (74 Series)
Output drive: 10 LS-TTL loads
Package Description
September 1983
Revised February 1999
www.fairchildsemi.com
CC
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MM74HC273M Summary of contents

Page 1

... M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-153, 0.300” Wide MM74HC273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC273MTC MTC20 20-Lead thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC273N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “ ...

Page 2

... HIGH Level (Steady State) L LOW Level (Steady State) X Don’t Care Transition from LOW-to-HIGH level Q The level of Q before the indicated steady state input conditions were 0 established www.fairchildsemi.com Logic Diagram Outputs ...

Page 3

... V value at 5.5V is 3.85V.) The worst case leakage cur Min Max Units 1000 ns 500 ns 400 125 Units Guaranteed Limits 1.5 1.5 V 3.15 3.15 V 4.2 4.2 V 0.5 0.5 V 1.35 1.35 V 1.8 1.8 V 1.9 1.9 V 4.4 4.4 V 5.9 5.9 V 3.84 3.7 V 5.34 5.2 V 0.1 0.1 V 0.1 0.1 V 0.1 0.1 V 0.33 0.4 V 0.33 0.4 V 1.0 1 160 A www.fairchildsemi.com ...

Page 4

... Fall Time C Power Dissipation (per flip-flop) PD Capacitance (Note 5) C Maximum Input IN Capacitance Note 5: C determines the no load dynamic power consumption www.fairchildsemi.com Conditions Typ Typ Guaranteed Limits 2. ...

Page 5

... Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20B Package Number M20D 5 www.fairchildsemi.com ...

Page 6

... Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC20 6 ...

Page 7

... Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. Package Number N20A 2 ...

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