DS2151 Dallas Semiconducotr, DS2151 Datasheet

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DS2151

Manufacturer Part Number
DS2151
Description
T1 Single-Chip Transceiver
Manufacturer
Dallas Semiconducotr
Datasheet

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FEATURES
§ Complete DS1/ISDN-PRI transceiver
§ Line interface can handle both long- and
§ 32-bit or 128-bit jitter attenuator
§ Generates DSX-1 and CSU line build outs
§ Frames to D4, ESF, and SLC-96
§ Dual onboard two-frame elastic store slip
§ 8-bit parallel control port that can be used on
§ Extracts and inserts Robbed-Bit signaling
§ Detects and generates yellow and blue alarms
§ Programmable output clocks for Fractional T1
§ Fully independent transmit and receive
§ Onboard FDL support circuitry
§ Generates and detects CSU loop codes
§ Contains ANSI one’s density monitor and
§ Large path and line error counters including
§ Pin compatible with DS2153Q E1 Single-
§ 5V supply; low power CMOS
§ Industrial grade version (-40 C to +85 C)
DESCRIPTION
The DS2151Q T1 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection
to T1 lines whether they be DS-1 long haul or DSX-1 short haul.
automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can generate both
DSX-1 line build outs as well as CSU build outs of -7.5 dB, -15 dB, and -22.5 dB. The onboard jitter
attenuator (selectable to either 32 bits or 128 bits) can be placed in either the transmit or receive data
paths. The framer locates the frame and multiframe boundaries and monitors the data stream for alarms.
It is also used for extracting and inserting Robbed-Bit signaling data and FDL data. The device contains
a set of 64 8-bit internal registers which the user can access to control the operation of the unit. Quick
access via the parallel control port allows a single micro to handle many T1 lines. The device fully meets
all of the latest T1 specifications including ANSI T1.403-199X, AT&T TR 62411 (12-90), and ITU
G.703, G.704, G.706, G.823, and I.431.
www.dalsemi.com
functionality
short-haul trunks
buffers that connect to backplanes up to 8.192
MHz
either multiplexed or non-multiplexed buses
functionality
enforcer
BPV, CV, CRC6, and framing bit errors
Chip Transceiver
available (DS2151QN)
R
formats
1 of 51
T1 Single-Chip Transceiver
PIN ASSIGNMENT
RLOS/LOTC
RCHCLK
SYSCLK
RSYNC
DS2151Q
RLCLK
RLINK
T1SCT
DVSS
RSER
RCLK
Dallas
ALE
WR
10
11
12
13
14
15
16
17
7
8
9
ACTUAL SIZE OF 44-PIN PLCC
FUNCTIONAL BLOCKS
PARALLEL CONTROL
The clock recovery circuitry
PORT
DS2151Q
38
37
36
35
34
33
32
31
30
29
39
TSER
TCLK
DVDD
TSYNC
TLINK
TLCLK
TCHBLK
TRING
TVDD
TVSS
TTIP
081099

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