ADS7820 Burr-Brown Corporation, ADS7820 Datasheet
ADS7820
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ADS7820 Summary of contents
Page 1
... Laser- trimmed scaling resistors provide +5V input range, with power dissipation under 100mW. The 28-pin ADS7820 is available in a plastic 0.3" DIP and in an SOIC, both fully specified for operation over the industrial – +85 C range. ...
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... 45kHz 45kHz 45kHz 70 IN 250 40 FS Step 150 2.48 2.5 1 2.3 2.5 –0.3 +2 1.6mA SINK = 500 A +4 SOURCE High-Z State OUT DIG High-Z State 2 ADS7820PB/UB MAX MIN TYP MAX 1.0 0.5 1.0 0.5 0.5 0.25 5 0.5 0. 0.75 0.5 – 2.52 2.7 100 +0.8 V +0. Parallel 12 bits Straight Binary +0 ...
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... SOIC NOTES: (1) LSB means Least Significant Bit. For the 12-bit +5V input ADS7820, one LSB is 1.22mV. (2) Typical rms noise at worst case transitions and temperatures. (3) Adjustable to zero with external potentiometer as shown in Figure 4b. (4) Full scale error is the worst case of Full Scale untrimmed deviation from ideal last code transition divided by the transition voltage and includes the effect of offset error ...
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... CS or R/C must be high when BUSY rises, or another conversion will start, without time for signal acquisition Analog Supply Input. Nominally +5V. Connect directly to pin 28. Decouple to ground with 0.1 F ceramic and 10 F Tantalum ANA capacitors Digital Supply Input. Nominally +5V. Connect directly to pin 27. Must be DIG ® ADS7820 V DIG V ANA BUSY CS R/C BYTE DZ DZ ...
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... DIG ANA INTERNAL REFERENCE VOLTAGE vs TEMPERATURE 2.52 2.515 2.51 2.505 2.5 2.495 2.49 2.485 2.48 –40 – Temperature (°C) ADS7820 AT +25°C Min/Max INL Errors –0.051 at 03962 0.086 at 02048 0.2 +0.1 0 –0.1 –0.2 0 512 1024 1536 2048 2560 Decimal Code = +5V, using internal reference, unless otherwise specified. ...
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... BASIC OPERATION Figure 1 shows a basic circuit to operate the ADS7820 with a full parallel data output. Taking R/C (pin 24) LOW for a minimum of 40ns (5.4 s max) will initiate a conversion. BUSY (pin 26) will go LOW and stay LOW until the conversion is completed and the output registers are up- dated ...
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... READING DATA The ADS7820 outputs full or byte-reading parallel data in Straight Binary data output format. The parallel output will be active when R/C (pin 24) is HIGH and CS (pin 25) is LOW. Any other combination of CS and R/C will tri-state the parallel output. Valid conversion data can be read in a full parallel, 12-bit word or two 8-bit bytes on pins 6-13 and pins 15-22 ...
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... FIGURE 3. Conversion Timing with Outputs Enabled after Conversion (CS Tied LOW.) R/C CS BUSY MODE Acquire DATA BUS FIGURE 4. Using CS to Control Conversion and Read Timing. R/C BYTE Pins Pins FIGURE 5. Using CS and BYTE to Control Data Bus. ® ADS7820 Convert ...
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... To achieve optimum performance, several iterations may be required. GAIN ADJUSTMENT To calibrate the gain of the ADS7820, a 576k resistor must be tied between the REF pin and a 5V potentiometer (see Figure 6b). The calibration range is 15mV for the gain. ...
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... DIG on the data bus. Intermediate latches are beneficial on any monolithic A/D converter. The ADS7820 has an internal LSB size of 610 V. Transients from fast switching signals on the parallel port, even when the A/D is tri-stated, can be coupled through the substrate to the analog circuitry causing degradation of converter performance ...