ICL7134 Intersil, ICL7134 Datasheet
ICL7134
Available stocks
Related parts for ICL7134
ICL7134 Summary of contents
Page 1
... DAC register can also be loaded directly from the data inputs, in which case the MS and LS registers are transparent. The ICL7134 is available in two versions. The ICL7134U is programmed for unipolar operation while the ICL7134B is programmed for bipolar applications. The V most significant bit of the DAC is separated from the reference input to the remainder of the ladder ...
Page 2
... Pinout Functional Block Diagram ICL7134 ICL7134 (OUTLINE DWG JI) TOP VIEW (LSB OUT AGND AGND DGND RFM INV D 11 ...
Page 3
... Analog Ground sense line. Reference point for external circuitry. Pin should carry minimal current; tied internally to S AGND . Current output pin. OUT 26 V+ Positive Supply Address 1 Registers Select Lines Address 0 0 ICL7134 PIN DESCRIPTION Input Data Bits (High = True ...
Page 4
... F An, Dn, WR, CS, PROG . . . . . . . . . . . . . . . . . . . . -0. +0.3V Operating Conditions Temperature Range ICL7134XXC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 ICL7134XXI -25 ICL7134XXM -55 CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. ...
Page 5
... D0 - D13 connected to 2.4V. Switching Specifications V+ = 5V, T PARAMETER Address-WRITE Set-Up Time Address-WRITE Hold Time CHIP SELECT-WRITE Set-Up Time CHIP SELECT-WRITE Hold Time WRITE Pulse Width Low Data-WRITE Set-Up Time Data-WRITE Hold Time ICL7134 o = +10V AGND = DGND, I REF A TEST CONDITIONS , I at Ground RFM ...
Page 6
... Test Circuits FIGURE 2. POWER SUPPLY REJECTION TEST CIRCUIT ICL7134 FIGURE 1. NON-LINEARITY TEST CIRCUIT 6 ...
Page 7
... Test Circuits (Continued) FIGURE 3. FEEDTHROUGH ERROR TEST CIRCUIT FIGURE 4. OUTPUT CURRENT SETTLING TIME TEST CIRCUIT Timing Diagrams FIGURE 5A. USING 14-BIT TRANSPARENT ADDRESSING ICL7134 7 ...
Page 8
... Timing Diagrams FIGURE 5B. USING FULL BUFFER 8-BIT ADDRESSING CAPABILITY ICL7134 8 ...
Page 9
... Output Leakage Current - Current which appears on I terminal when all DAC register outputs are LOW. Detailed Description The ICL7134 consists of 14-bit primary DAC, two PROM controlled correction DACs, input buffer registers, and microprocessor interface logic (See Functional Block Diagram). The 14-bit primary DAC is an R-2R thin film resistor ladder with N-channel MOS SPDT current steering switches ...
Page 10
... Unused digital inputs must be connected to GND or V+ for proper operation. Unipolar Binary Operation (ICL7134U) potential must be The circuit configuration for unipolar mode operation (ICL7134U) is shown in Figure 8. With positive and negative V values the circuit is capable of two-quadrant REF multiplication. The “digital input code/analog output value” ...
Page 11
... Table 3. Amplifier A resistors R INV1 circuit. The MSB ladder leg sees a reference input of approximately -V the polarity of the other bits. In addition, the ICL7134B’s feedback resistance is switched to 2R under PROM control, so that the bipolar output range 1/2 ). Again, the grounding arrangement of Figure 9 can be used if necessary. TABLE 3. CODE TABLE - BIPOLAR (2’ ...
Page 12
... The ease of interfacing to a processor can be seen from 0 1 Figure 11, which shows the ICL7134 connected to an 8035 or any other processor such as an 8049. The data bus feeds into both register inputs; three port lines, in combination with the WR line, control the byte-wide loading into these registers and then the DAC register ...
Page 13
... FIGURE 11. ICL7134 INTERFACE TO 8048 SYSTEM FIGURE 13. 8085 SYSTEM INTERFACE ICL7134 FIGURE 12. INTERFACE TO 8080 SYSTEM 13 ...
Page 14
... WR line to enter the data into the DAC (as shown in Figure 15 well separated from the analog lines on the ICL7134, and is usually not a very active line in 8048 systems. Additional “protection” can be achieved by gating the processor WR line with another port line. The ...
Page 15
... ICL7134 FIGURE 17. SUCCESSIVE APPROXIMATION A/D CONVERTER 15 ...
Page 16
... Great care should be taken in the board layout to minimize ground loop and similar “hidden resistor” problems, as well as to minimize digital signal feedthrough. A suitable layout for the immediate vicinity of the ICL7134 is shown in Figure 18, and may be used as a guide. FIGURE 18B. TOP SIDE WITH COMPONENT PLACEMENT ...