DAC1208 National Semiconductor, DAC1208 Datasheet

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DAC1208

Manufacturer Part Number
DAC1208
Description
12-Bit/ uP Compatible/ Double-Buffered D to A Converters
Manufacturer
National Semiconductor
Datasheet

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C 1995 National Semiconductor Corporation
MICRO-DAC
DAC1231 DAC1232 12-Bit
Double-Buffered D to A Converters
General Description
The DAC1208 and the DAC1230 series are 12-bit multiply-
ing D to A converters designed to interface directly with a
wide variety of microprocessors (8080 8048 8085 Z-80
etc ) Double buffering input registers and associated con-
trol lines allow these DACs to appear as a two-byte ‘‘stack’’
in the system’s memory or I O space with no additional in-
terfacing logic required
The DAC1208 series provides all 12 input lines to allow sin-
gle buffering for maximum throughput when used with 16-bit
processors These input lines can also be externally config-
ured to permit an 8-bit data interface The DAC1230 series
can be used with an 8-bit data bus directly as it internally
formulates the 12-bit DAC data from its 8 input lines All of
these DACs accept left-justified data from the processor
The analog section is a precision silicon-chromium (Si-Cr)
R-2R ladder network and twelve CMOS current switches
An inverted R-2R ladder structure is used with the binary
weighted currents switched between the I
maintaining a constant current in each ladder leg indepen-
dent of the switch state Special circuitry provides TTL logic
input voltage level compatibility
The DAC1208 series and DAC1230 series are the 12-bit
members of a family of microprocessor compatible DACs
(MICRO-DACs
tions the DAC1000 series for 10-bit and DAC0830 series
for 8-bit are available alternatives
Typical Application
TRI-STATE is a registered trademark of National Semiconductor Corp
MICRO-DAC
TM
is a trademark of National Semiconductor Corp
TM
) For applications requiring other resolu-
TM
TL H 5690
DAC1208 DAC1209 DAC1210 DAC1230
OUT1
and I
OUT2
P Compatible
Features
Y
Y
Y
Y
Y
Y
Y
Y
Key Specifications
Y
Y
Y
Y
Y
Y
Linearity specified with zero and full-scale adjust only
Direct interface to all popular microprocessors
Double-buffered single-buffered or flow through digital
data inputs
Logic inputs which meet TTL voltage level specs (1 4V
logic threshold)
Works with
multiplication
Operates stand-alone (without P) if desired
All parts guaranteed 12-bit monotonic
DAC1230 series is pin compatible with the DAC0830
series 8-bit MICRO-DACs
Current Settling Time
Resolution
Linearity (Guaranteed
over temperature)
Gain Tempco
Low Power Dissipation
Single Power Supply
g
10V reference full 4-quadrant
10 11 or 12 Bits of FS
RRD-B30M115 Printed in U S A
5 V
TL H 5690 – 1
February 1995
DC
1 3 ppm C
to 15 V
20 mW
12 Bits
1 s
DC

Related parts for DAC1208

DAC1208 Summary of contents

Page 1

... DACs to appear as a two-byte ‘‘stack’’ in the system’s memory space with no additional in- terfacing logic required The DAC1208 series provides all 12 input lines to allow sin- gle buffering for maximum throughput when used with 16-bit processors These input lines can also be externally config- ...

Page 2

... Digital Inputs Digital Inputs Operating Conditions Lead Temperature (Soldering 10 sec ) Temperature Range DAC1208LCJ DAC1209LCJ DAC1210LCJ DAC1230LCJ 17 V DAC1231LCJ DAC1232LCJ DC DAC1231LIN DAC1232LIN V to GND CC DAC1208LCJ-1 DAC1210LCJ-1 25V g DAC1230LCJ-1 DAC1231LCJ 150 C a DAC1232LCJ-1 DAC1231LCN 500 mW DAC1232LCN DAC1231LCWM DAC1232LCWM Range 100 ...

Page 3

... Note 7 The unit FSR stands for full-scale range Linearity Error and Power Supply Rejection specs are based on this unit to eliminate dependence on a particular V value to indicate the true performance of the part The Linearity Error specification of the DAC1208 is 0 012% of FSR(max) This guarantees that after REF ...

Page 4

Switching Waveforms Typical Performance Characteristics Digital Input Threshold Gain and Linearity Error Variation vs Supply Voltage Write Pulse Width t Digital Input Threshold vs Temperature Control Set-Up Time t CS Data Set-Up Time ...

Page 5

... optimum for GND Pins 3 and 12 of the DAC1208 DAC1209 and DAC1210 must be connected to ground Pins 3 and End Point Test After Zero and FS Adjust the DAC1230 DAC1231 and DAC1232 must be connected to ground It is important that I potential for current switching applications Any difference ...

Page 6

... I O space) to receive their 12 bits of input data in two successive 8-bit data writing sequences The DAC1230 se- ries is intended for use in systems with an 8-bit data bus The DAC1208 series provides all 12 digital input lines which can be externally configured to be controlled from an 8-bit bus or can be driven directly from a 16-bit data bus ...

Page 7

Application Hints (Continued Automatic Transfer The 12-bit DAC word is automatically transferred to the DAC register and the R-2R ladder when the second write (the 4 LSBs of the data) occurs 1 2 Independent Processor Transfer Control In ...

Page 8

... XFER and WR2 grounded Byte 1 Byte 2 tied to V FIGURE 4 16-Bit Data Bus Interface for the DAC1208 Series 1 5 16-Bit Data Bus Interface The DAC1208 series provides all 12 digital input lines to permit a direct parallel interface to a 16-bit data bus In this instance double buffering is not always necessary (unless a ...

Page 9

... ROM is continuously providing DAC data Only the DAC1208 DAC1209 DAC1210 devices can have all 12 inputs flow-through Simply grounding CS WR1 WR2 and XFER and tying Byte 1 Byte 2 high allows both internal ...

Page 10

Application Hints (Continued) width If this does not provide a sufficient data hold time at the end of the write cycle a negative edge triggered one- shot can be included between the system write strobe and the WR pin of ...

Page 11

Application Hints (Continued) FIGURE 8 TRI-STATE Buffers Isolate the Data and Control Lines from the DACs A Transfer Word Provides a Flexible Update 5690-14 ...

Page 12

... Figure 9 FIGURE 9 Unipolar Output Configuration BI-FET trademark of National Semiconductor Corp The inverting input of the op amp is a virtual ground created by the feedback from its output through the internal 15 k resistor R All of the output current (determined by the ...

Page 13

Application Hints (Continued) Transient response and settling time of the op amp are im- portant in fast data throughput applications The largest sta- bility problem is the feedback pole created by the feedback resistance R and the output capacitance of ...

Page 14

Application Hints (Continued Zero and Full-Scale Adjustments To calibrate the bipolar output circuit three adjustments are required The first step is to set all of the digital inputs LOW (to force then null the ...

Page 15

Application Hints (Continued) 1 Amp( 4096 High Current Controller 8-Bit Course 4-Bit Vernier DAC 5690 – 5690 – 20 ...

Page 16

... Ordering Information Part Number Non-Linearity DAC1208LCJ 0 018% DAC1208LCJ-1 0 018% DAC1209LCJ 0 024% DAC1210LCJ 0 050% DAC1210LCJ-1 0 050% DAC1230LCJ 0 018% DAC1230LCJ-1 0 018% DAC1231LCJ 0 024% DAC1231LCJ-1 0 024% DAC1231LCN 0 024% DAC1231LCWM 0 024% DAC1231LIN 0 024% DAC1232LCJ 0 050% DAC1232LCJ-1 0 050% DAC1232LCN 0 050% DAC1232LCWM 0 050% DAC1232LIN 0 050% Temperature Package ...

Page 17

... Physical Dimensions inches (millimeters) 20-Lead Ceramic Dual-In-Line Package (J) Order Number DAC1230LCJ DAC1230LCJ-1 DAC1231LCJ DAC1231LCJ-1 DAC1232LCJ or DAC1232LCJ-1 24-Lead Ceramic Dual-In-Line Package (J) Order Number DAC1208LCJ DAC1208LCJ-1 DAC1209LCJ DAC1210LCJ or DAC1210LCJ-1 NS Package Number J20A NS Package Number J24A 17 ...

Page 18

... Hong Kong Ltd 49) 0-180-530 85 86 13th Floor Straight Block a Ocean Centre 5 Canton Rd 49) 0-180-530 85 85 Tsimshatsui Kowloon a Tel ( 49) 0-180-532 78 32 Hong Kong a 49) 0-180-532 93 58 Tel (852) 2737-1600 a Tel ( 49) 0-180-534 16 80 Fax (852) 2736-9960 a National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 ...

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