SAA7826HL Philips Semiconductors, SAA7826HL Datasheet - Page 38

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SAA7826HL

Manufacturer Part Number
SAA7826HL
Description
CD audio decoder/ digital servo and filterless DAC with integrated pre-amp and laser control
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
7.17.1
7.17.1.1
The sixteen 4-bit programmable configuration registers,
0 to F (see Table 15), can be written to via the
microcontroller interface using the protocol shown in
Fig.25. It should be noted that SILD must be held HIGH;
A3 to A0 identifies the register number and D3 to D0 is the
data. The data is latched into the register on the
LOW-to-HIGH transition of RAB.
7.17.1.2
The same data can be repeated several times (e.g. for a
fade function) by applying extra RAB pulses as shown in
Fig.26. It should be noted that SCL must stay HIGH
between RAB pulses.
7.17.1.3
Some of the new shadow registers are a multiple of four
bits in length and require a number of write operations to
fill them up; see Section 7.17.5. They must be completely
filled before writing to another register, otherwise
unpredictable behaviour may result.
The protocol for writing to these registers is exactly the
same as the decoder registers; see Fig.25. The write
command must be executed multiple times with the same
address content. The first four bits of data in a sequence
of write commands represent the most significant nibble of
the register, while the last four represent the least
significant nibble. The data content can change from one
write to the next without consequence.
7.17.1.4
There are several internal status signals, selected via
register 2, which can be made available on the SDA line:
2003 Oct 01
SUBQREADY-I: LOW if new subcode word is ready in
Q-channel register
MOTSTART1: HIGH if motor is turning at 75% or more
of nominal speed
MOTSTART2: HIGH if motor is turning at 50% or more
of nominal speed
MOTSTOP: HIGH if motor is turning at 12% or less of
nominal speed; can be set to indicate 6% or less
(instead of 12% or less) via register E
PLL lock: HIGH if sync coincidence signals are found
CD audio decoder, digital servo and filterless
DAC with integrated pre-amp and laser control
M
ICROCONTROLLER INTERFACE
Writing data to registers 0 to F
Writing repeated data to registers 0 to F
Multiple writes to the new shadow registers
Reading decoder status information on SDA
(4-
WIRE BUS MODE
)
38
The status read protocol is illustrated in Fig.27. It should be
noted that SILD must be held HIGH.
7.17.1.5
To read the Q-channel subcode direct in the 4-wire bus
mode, the SUBQREADY-I signal should be selected as
the status signal. The subcode read protocol is illustrated
in Fig.28.
It should be noted that SILD must be held HIGH; after
subcode read starts, the microcontroller may take as long
as it wants to terminate the read operation. When enough
subcode has been read (1 to 96 bits), the reading can be
terminated by pulling RAB LOW.
Alternatively, the Q-channel subcode can be read using a
servo command as follows:
7.17.1.6
When the CRC of the Q-channel word is good, and no
subcode is being read, the SUBQREADY-I status signal
will react as illustrated in Fig.29. When the CRC is good
and the subcode is being read, the timing in Fig.30 applies.
If t
is below 2.6/n ms, then t
microcontroller can read all subcode frames if it completes
the read operation within 2.6/n ms after the subcode is
ready). If these criteria are not met, it is only possible to
guarantee that t
If subcode frames with failed CRCs are present, the
t
defective subcode frame.
It should be noted that in the lock-to-disc mode ‘n’ is
replaced by ‘d’, which is the disc speed factor.
2
and t
V1: follows input on pin V1
V2: follows input on pin V2
MOTOR-OV: HIGH if the motor servo output stage
saturates.
Use the read high-level status command to monitor the
subcode ready signal
Send the read subcode command and read the required
number of bytes (up to 12)
Send the read HIGH-level status command; to re-enable
the decoder interface.
1
(SUBQREADY-I status LOW to end of subcode read)
3
times will be increased by 13.1/n ms for each
Reading Q-channel subcode
Behaviour of the SUBQREADY-I signal
3
will be below 26.2/n ms (approximately).
2
= 13.1/n ms (i.e. the
Product specification
SAA7826

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