XC3030L Xilinx, XC3030L Datasheet - Page 38

• Manufacturer Part Number: XC3030L
• Description: Logic Cell Array Families
• Manufacturer: Xilinx

Peripheral mode and Master Parallel mode are not supported in the PC44 package
XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families
Pin No.
Pin No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
10
11
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
XC3000, XC3000A, XC3000L, XC3100 and XC3100A families have identical pinouts
XC3000, XC3000A, XC3000L and XC3100 families have identical pinouts
A1-CS2-I/O
TCLKIN-I/O
TCLKIN-I/O
M1-RDATA
M1-RDATA
A0-WS-I/O
M0-RTRIG
M0-RTRIG
PWRDWN
PWRDN
HDC-I/O
XC3030
XC3030
LDC-I/O
INIT-I/O
A14-I/O
A13-I/O
A12-I/O
A11-I/O
A10-I/O
M2-I/O
A2-I/O
A3-I/O
A4-I/O
A5-I/O
A6-I/O
A7-I/O
A8-I/O
A9-I/O
GND
GND
VCC
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
XC3030 Family 64-Pin Plastic VQFP Pinouts
XC3000 Family 44-Pin PLCC Pinouts
2-140
Pin No.
Pin No.
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
XTAL1(OUT)-BCLKIN-I/O
XTL1(OUT)-BCLK-I/O
RDY/BUSY-RCLK-I/O
XTAL2(IN)-I/O
XTL2(IN)-I/O
DONE-PGM
D0-DIN-I/O
DOUT-I/O
DONE-PG
DOUT-I/O
XC3030
RESET
DIN-I/O
HDC-I/O
XC3030
LDC-I/O
INIT-I/O
CS0-I/O
CS1-I/O
RESET
CCLK
M2-I/O
D7-I/O
D6-I/O
D5-I/O
D4-I/O
D3-I/O
D2-I/O
D1-I/O
GND
CCLK
VCC
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O