MC68HC11E0 Motorola, MC68HC11E0 Datasheet - Page 32

• Manufacturer Part Number: MC68HC11E0
• Description: (MC68HC711E Series) M68HC11E Series Programming Reference Guide
• Manufacturer: Motorola

M68HC11ERG/AD
32
EE[3:0] — EEPROM Map Position (MC68HC811E2 only)
NOSEC — Security Disable
NOCOP — COP System Disable
ROMON — ROM/EPROM Enable
EEON — EEPROM Enable
M68HC11E Series Programming Reference Guide
EE[3:0] determine the upper four bits of EEPROM address, positioning
EEPROM at the selected 4-Kbyte boundary. In single-chip and boot modes,
these bits are set to 1s during reset and EEPROM is mapped to top of
memory. Not implemented in other E-series devices; always read 0. Refer
to the following table.
NOSEC is invalid unless the security mask option is specified before the
MCU is manufactured. If the security mask option is omitted NOSEC always
reads 1. The enhanced security feature is available in the MC68S711E9
MCU. The enhancement to the standard security feature protects the
EPROM as well as RAM and EEPROM.
Resets to programmed value.
In single-chip mode, ROMON is forced to 1 out of reset. ROMON does not
apply to the MC68HC811E2. For devices with disabled ROM arrays (the
MC68HC11E0, MC68HC11E1, MC68L11E0, or MC68L11E1) ROMON
must never be set to 1.
0 = RAM/EEPROM security mode enabled
1 = RAM/EEPROM security mode disabled
0 = COP enabled (forces reset on timeout)
1 = COP disabled (does not force reset on timeout)
0 = ROM/EPROM removed from the memory map
1 = ROM/EPROM present in the memory map
0 = EEPROM removed from the memory map
1 = EEPROM present in the memory map
EE3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
EE1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
EE2
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
EE0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
EEPROM Location
$A800–$AFFF
$B800–$BFFF
$C800–$CFFF
$D800–$DFFF
$E800–$EFFF
$F800–$FFFF
$0800–$0FFF
$1800–$1FFF
$2800–$2FFF
$3800–$3FFF
$4800–$4FFF
$5800–$5FFF
$6800–$6FFF
$7800–$7FFF
$8800–$8FFF
$9800–$9FFF
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