MC68HC11E0 Motorola, MC68HC11E0 Datasheet - Page 46

• Manufacturer Part Number: MC68HC11E0
• Description: (MC68HC711E Series) M68HC11E Series Programming Reference Guide
• Manufacturer: Motorola

M68HC11ERG/AD
Serial Peripheral Interface Control Register (SPCR)
46
OR — Overrun Error Flag
NF — Noise Error Flag
FE — Framing Error Flag
Bit 0 — Unimplemented
SPIE — Serial Peripheral Interrupt Enable
SPE — Serial Peripheral System Enable
DWOM — Port D Wired-OR Mode Option for Port D Pins PD[5:0]
MSTR — Master Mode Select
CPOL, CPHA — Clock Polarity, Clock Phase
SPR[1:0] — SPI Clock Rate Select
Address: $1028
Reset:
Read:
Write:
M68HC11E Series Programming Reference Guide
OR is set if a new character is received before a previously received
character is read from SCDR. Clear the OR flag by reading SCSR with OR
set and then reading SCDR.
NF is set if majority sample logic detects anything other than a unanimous
decision. Clear NF by reading SCSR with NF set and then reading SCDR.
FE is set when a 0 is detected where a stop bit was expected. Clear the FE
flag by reading SCSR with FE set and then reading SCDR.
Always reads 0
Refer to
See the following table.
0 = No overrun
1 = Overrun detected
0 = Unanimous decision
1 = Noise detected
0 = Stop bit detected
1 = Zero detected
0 = SPI interrupts disabled
1 = SPI interrupts enabled
0 = SPI off
1 = SPI on
0 = Normal CMOS outputs
1 = Open-drain outputs
0 = Slave mode
1 = Master mode
SPIE
Bit 7
0
Figure 7
SPE
6
0
DWOM
5
0
MSTR
4
0
CPOL
3
0
CPHA
2
1
SPR1
U
1
MOTOROLA
SPR0
Bit 0
U