MC68HC11E0 Motorola, MC68HC11E0 Datasheet - Page 50

• Manufacturer Part Number: MC68HC11E0
• Description: (MC68HC711E Series) M68HC11E Series Programming Reference Guide
• Manufacturer: Motorola

M68HC11ERG/AD
Timer Interrupt Flag 1 Register (TFLG1)
Timer Interrupt Flag 2 Register (TFLG2)
50
FCM — Force Clock Monitor Failure (Test modes only)
FCOP — Force COP Watchdog Failure (Test modes only)
TCON — Test Configuration (Test modes only)
Clear flags by writing a 1 to the corresponding bit position(s).
OC1F–OC4F — Output Compare x Flag
IC1F–IC3F — Input Capture x Flag
Clear flags by writing a 1 to the corresponding bit position(s).
TOF — Timer Overflow Flag
RTIF — Real-Time (Periodic) Interrupt Flag
PAOVF — Pulse Accumulator Overflow Flag
PAIF — Pulse Accumulator Input Edge Flag
Bits [3:0] — Unimplemented
Address: $1023
Address: $1025
Reset:
Reset:
Read:
Read:
Write:
Write:
M68HC11E Series Programming Reference Guide
Set each time the counter matches output compare x value.
I4/O5F — Input Capture 4/Output Compare 5 Flag
Set by IC4 or OC5, depending on which function was enabled by I4/O5 of
PACTL.
Set each time a selected active edge is detected on the ICx input line.
Set when TCNT changes from $FFFF to $0000
The RTIF status bit is automatically set to 1 at the end of every RTI period.
To clear RTIF, write a byte to TFLG2 with bit 6 set.
Set when PACNT changes from $FF to $00
Set each time a selected active edge is detected on the PAI input line.
Always reads 0
OC1F
Bit 7
Bit 7
TOF
0
0
= Unimplemented
OC2F
RTIF
6
0
6
0
PAOVF
OC3F
5
5
0
0
OC4F
PAIF
4
0
4
0
IR/O5F
3
0
3
0
IC1F
2
0
2
0
1C2F
1
0
1
0
MOTOROLA
IC3F
Bit 0
Bit 0
0
0